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| TPA3244 Datasheet, PDF (20/32 Pages) Texas Instruments – 100W peak PurePath Ultra-HD Pad Down Class-D Amplifier | |||
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TPA3244
SLASEC6 â APRIL 2016
Powering Up (continued)
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PVDD
VDD
GVDD
tRESET delay > 400ms
DVDD
/RESET
tAVDD ramp C 100µs
tPrecharge C 220ms
AVDD
/FAULT
VIN_X
OUT_X
VOUT_X
tStartup ramp
Figure 9. Startup Timing
When RESET is released to turn on the TPA3244 device, FAULT signal will turn low and AVDD voltage regulator
will be enabled. FAULT will stay low until AVDD reaches the undervoltage protection (UVP) voltage threshold
(see the Electrical Characteristics table of this data sheet). After a precharge time to stabilize the DC voltage
across the input AC coupling capacitors, before the ramp up sequence starts.
9.3 Powering Down
The TPA3244 device does not require a power-down sequence. The device remains fully operational as long as
the gate-drive supply (GVDD_X) voltage and VDD voltage are above the undervoltage protection (UVP) voltage
threshold. Although not specifically required, it is a good practice to hold RESET low during power down, thus
preventing audible artifacts including pops or clicks by initiating a controlled ramp down sequence of the output
voltage.
20
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