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THS770006_14 Datasheet, PDF (20/40 Pages) Texas Instruments – Broadband, Fully-Differential, 14-/16-Bit ADC DRIVER AMPLIFIER
THS770006
SBOS520B – JULY 2010 – REVISED JANUARY 2012
www.ti.com
Driving Capcitive Loads
The THS770006 is tested as described previously, with the data shown in the typical graphs. As a result of the
fixed gain architecture of the device, the only practical means to avoid stability problems such as
overshoot/ringing, gain peaking, and oscillation when driving capacitive loads is to place small resistors in series
with the outputs (RO) to isolate the phase shift caused by the capacitive load from the feedback loop of the
amplifier. The Typical Characteristics graphs show recommended values for an optimally flat frequency response
with maximum bandwidth. Smaller values of RO can be used if more peaking is allowed, and larger values can
be used to reduce the bandwidth.
Driving ADCs
The THS770006 is designed and optimized for the highest performance to drive differential input ADCs.
Figure 36 shows a generic block diagram of the THS770006 driving an ADC. The primary interface circuit
between the amplifier and the ADC is usually a filter of some type for antialias purposes, and provides a means
to bias the signal to the input common-mode voltage required by the ADC. Filters range from single-order real
RC poles to higher-order LC filters, depending on the requirements of the application. Output resistors (RO) are
shown on the amplifier outputs to isolate the amplifier from any capacitive loading presented by the filter.
VIN-
VIN+
VOCM
50W
50W
THS770006
100W
VOCM
100W
VOUT+
RO
VOUT-
RO
Filter
and
Bias
AIN+
ADC
AIN- CM
Figure 36. Generic ADC Driver Block Diagram
The key points to consider for implementation are described in the following three subsections.
SNR Considerations
The signal-to-noise ratio (SNR) of the amplifier and filter can be calculated from the amplitude of the signal and
the bandwidth of the filter. The noise from the amplifier is band-limited by the filter with the equivalent brick-wall
filter bandwidth. The amplifier and filter noise can be calculated using the following equations:
× SNRAMP+FILTER = 10 log
V2O
= 20 × log
e2FILTEROUT
VO
eFILTEROUT
Where:
eFILTEROUT = eNAMPOUT • √ENB
eNAMPOUT = the output noise density of the THS770006 (3.4nV/√Hz)
ENB = the brick-wall equivalent noise bandwidth of the filter
VO is the amplifier output signal.
(1)
For example, with a first-order (N = 1) band-pass or low-pass filter with 30MHz cutoff, the ENB is 1.57 • f–3dB =
1.57 • 30MHz = 47.1MHz. For second-order (N = 2) filters, the ENB is 1.22 • f–3dB. As the filter order increases,
the ENB approaches f–3dB (N = 3 → ENB = 1.15 • f–3dB; N = 4 → ENB = 1.13 • f–3dB). Both VO and eFILTEROUT are
in RMS voltages. For example, with a 2VPP (0.707VRMS) output signal and 30MHz first-order filter, the SNR of the
amplifier and filter is 70.7dB with eFILTEROUT = 3.4nV/√Hz • √47.1MHz = 23μVRMS.
The SNR of the amplifier, filter, and ADC sum in RMS fashion, as shown in Equation 2 (SNR values in dB):
× SNRSYSTEM = -20 log
-SNRAMP+FILTER
-SNRADC
10 10
+ 10 10
(2)
20
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