THS3120_16 Datasheet, PDF (20/35 Pages) Texas Instruments – LOW-NOISE, HIGH-OUTPUT DRIVE, CURRENT-FEEDBACK OPERATIONAL AMPLIFIERS

THS3120
THS3121
SLOS420E – SEPTEMBER 2003 – REVISED OCTOBER 2009........................................................................................................................................ www.ti.com
PRINTED-CIRCUIT BOARD LAYOUT
TECHNIQUES FOR OPTIMAL
PERFORMANCE
Achieving optimum performance with high frequency
amplifiers, like the THS3120 and THS3121, requires
careful attention to board layout parasitic and external
component types. Recommendations that optimize
performance include:
• Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. Parasitic capacitance
on the output and input pins can cause instability.
To reduce unwanted capacitance, a window
around the signal I/O pins should be opened in all
of the ground and power planes around those
pins. Otherwise, ground and power planes should
be unbroken elsewhere on the board.
• Minimize the distance [< 0.25 inch, (6,4 mm)] from
the power-supply pins to high frequency 0.1-μF
and 100-pF decoupling capacitors. At the device
pins, the ground and power-plane layout should
not be in close proximity to the signal I/O pins.
Avoid narrow power and ground traces to
minimize inductance between the pins and the
decoupling capacitors. The power-supply
connections should always be decoupled with
these capacitors. Larger (6.8 μF or more)
tantalum decoupling capacitors, effective at lower
frequency, should also be used on the main
supply pins. These may be placed somewhat
farther from the device and may be shared among
several devices in the same area of the PC board.
• Careful selection and placement of external
components preserve the high-frequency
performance of the THS3120 and THS3121.
Resistors should be a very low reactance type.
Surface-mount resistors work best and allow a
tighter overall layout. Again, keep the leads and
printed circuit board (PCB) trace length as short
as possible. Never use wirewound type resistors
in a high-frequency application. Because the
output pin and inverting input pins are the most
sensitive to parasitic capacitance, always position
the feedback and series output resistors, if any, as
close as possible to the inverting input pins and
output pins. Other network components, such as
input termination resistors, should be placed close
to the gain-setting resistors. Even with a low
parasitic capacitance shunting the external
resistors, excessively high resistor values can
create significant time constants that can degrade
performance. Good axial metal-film or
surface-mount resistors have approximately
0.2 pF in shunt with the resistor. For resistor
values greater than 2.0 kΩ, this parasitic
capacitance can add a pole and/or a zero that can
effect circuit operation. Keep resistor values as
low as possible, consistent with load driving
considerations.
• Connections to other wideband devices on the
board may be made with short direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to
the next device as a lumped capacitive load.
Relatively wide traces [0.05 inch (1,3 mm) to
0.1 inch (2,54 mm)] should be used, preferably
with ground and power planes opened up around
them. Estimate the total capacitive load and
determine if isolation resistors on the outputs are
necessary. Low parasitic capacitive loads (less
than 4 pF) may not need an R_S because the
THS3120 and THS3121 are nominally
compensated to operate with a 2-pF parasitic
load. Higher parasitic capacitive loads without an
R_S are allowed as the signal gain increases
(increasing the unloaded phase margin). If a long
trace is required, and the 6-dB signal loss intrinsic
to a doubly-terminated transmission line is
acceptable, implement a matched impedance
transmission line using microstrip or stripline
techniques (consult an ECL design handbook for
microstrip and stripline layout techniques). A 50-Ω
environment is not necessary onboard, and in
fact, a higher impedance environment improves
distortion as shown in the distortion versus load
plots. With a characteristic board trace impedance
based on board material and trace dimensions, a
matching series resistor into the trace from the
output of the THS3120/THS3121 is used as well
as a terminating shunt resistor at the input of the
destination device. Remember also that the
terminating impedance is the parallel combination
of the shunt resistor and the input impedance of
the destination device: this total effective
impedance should be set to match the trace
impedance. If the 6-dB attenuation of a
doubly-terminated transmission line is
unacceptable, a long trace can be
series-terminated at the source end only. Treat
the trace as a capacitive load in this case. This
does not preserve signal integrity as well as a
doubly-terminated line. If the input impedance of
the destination device is low, there is some signal
attenuation due to the voltage divider formed by
the series output into the terminating impedance.
• Socketing a high-speed part like the THS3120 and
THS3121 is not recommended. The additional
lead length and pin-to-pin capacitance introduced
by the socket can create an extremely
troublesome parasitic network which can make it
almost impossible to achieve a smooth, stable
frequency response. Best results are obtained by
soldering the THS3120/THS3121 parts directly
onto the board.
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