OPA317-Q1 Datasheet, PDF (20/29 Pages) Texas Instruments – Zero-Drift, Low-Offset, Rail-to-Rail I/O Operational Amplifier

OPA317-Q1, OPA2317-Q1, OPA4317-Q1
SLOS914 – JULY 2016
11 Layout
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11.1 Layout Guidelines
Attention to good layout practice is always recommended. Keep traces short and, when possible, use a printed-
circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible.
Place a 0.1-μF capacitor closely across the supply pins. Apply these guidelines throughout the analog circuit to
improve performance and provide benefits, such as reducing the electromagnetic interference (EMI)
susceptibility.
Optimize circuit layout and mechanical conditions for lowest offset voltage and precision performance. Avoid
temperature gradients that create thermoelectric (Seebeck) effects in the thermocouple junctions formed from
connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by assuring they
are equal on both input terminals. Other layout and design considerations include:
• Use low thermoelectric-coefficient conditions (avoid dissimilar metals).
• Thermally isolate components from power supplies or other heat sources.
• Shield operational amplifier and input circuitry from air currents, such as cooling fans.
Following these guidelines reduces the likelihood of junctions being at different temperatures, which can cause
thermoelectric voltage drift of 0.1 μV/°C or higher, depending on the materials used.
11.2 Layout Example
VS+
VOUT
VS±
OUT
V+
GND
V±
Use a low-ESR,
ceramic bypass
capacitor.
VIN
+IN
GND
RG
±IN
GND
Run the input traces
as far away from
the supply lines
as possible.
RF
Place components
close to the device
and to each other to
reduce parasitic
errors.
Copyright © 2016, Texas Instruments Incorporated
Figure 25. OPAx317-Q1 Layout Example
Use a low-ESR,
ceramic bypass
capacitor.
20
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Copyright © 2016, Texas Instruments Incorporated
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