LMH6574 Datasheet, PDF (20/27 Pages) National Semiconductor (TI) – 4:1 High Speed Video Multiplexer

LMH6574
SNCS103D – NOVEMBER 2004 – REVISED DECEMBER 2014
8 Power Supply Recommendations
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8.1 Power Dissipation
The LMH6574 is optimized for maximum speed and performance in the small form factor of the standard SOIC
package. To ensure maximum output drive and highest performance, thermal shutdown is not provided.
Therefore, it is of utmost importance to make sure that the T_JMAX is never exceeded due to the overall power
dissipation.
Follow these steps to determine the Maximum power dissipation for the LMH6574:
1. Calculate the quiescent (no-load) power.
P_AMP = I_CC* (V_S)
where
• V_S = V⁺ - V^−
(1)
2. Calculate the RMS power dissipated in the output stage:
P_D (rms) = rms ((V_S - V_OUT) * I_OUT)
where
• V_OUT is the voltage across the external load
• I_OUT is the current through the external load
• V_S is the total supply voltage
(2)
3. Calculate the total RMS power: P_T = P_AMP + P_D.
The maximum power that the LMH6574 package can dissipate at a given temperature can be derived with the
following equation:
P_MAX = (150° – T_AMB)/R_θJA
where
• T_AMB = Ambient temperature (°C)
• R_θJA = Thermal resistance, from junction to ambient, for a given package (°C/W)
(3)
For the SOIC package R_θJA is 130 °C/W.
9 Layout
9.1 Layout Guidelines
Whenever questions about layout arise, use the evaluation board LMH730276 (SNOU028) as a guide. To reduce
parasitic capacitances, ground and power planes should be removed near the input and output pins. For long
signal paths controlled impedance lines should be used, along with impedance matching elements at both ends.
Bypass capacitors should be placed as close to the device as possible. Bypass capacitors from each rail to
ground are applied in pairs. The larger electrolytic bypass capacitors can be located farther from the device, the
smaller ceramic capacitors should be placed as close to the device as possible. In Figure 27, the capacitor
between V⁺ and V^− is optional, but is recommended for best second harmonic distortion. Another way to enhance
performance is to use pairs of 0.01 μF and 0.1 μF ceramic capacitors for each supply bypass.
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