LM5022-Q1 Datasheet, PDF (20/37 Pages) Texas Instruments – 60 V Low-Side Controller For Boost and SEPIC

LM5022-Q1
SNVSAG9 – MARCH 2016
www.ti.com
I_O-RMS = 1.13 x I_L x D x (1 - D)
(29)
The highest RMS current occurs at minimum input voltage. For this example the maximum output capacitor RMS
current is:
I_O-RMS(MAX) = 1.13 × 2.3 × (0.78 x 0.22)^0.5 = 1.08 A_RMS
(30)
These 2220 case size devices are capable of sustaining RMS currents of over 3A each, making them more than
adequate for this application.
8.2.2.6 VCC Decoupling Capacitor
The VCC pin should be decoupled with a ceramic capacitor placed as close as possible to the VCC and GND
pins of the LM5022-Q1. The decoupling capacitor should have a minimum X5R or X7R type dielectric to ensure
that the capacitance remains stable over voltage and temperature, and be rated to a minimum of 470 nF. One
good choice is a 1-µF device with X7R dielectric and 1206 case size rated to 25 V.
8.2.2.7 Input Capacitor
The input capacitors to a boost regulator control the input voltage ripple, ΔV_IN, hold up the input voltage during
load transients, and prevent impedance mismatch (also called power supply interaction) between the LM5022-Q1
and the inductance of the input leads. Selection of input capacitors is based on their capacitance, ESR, and RMS
current rating. The minimum value of ESR can be selected based on the maximum output current transient,
I_STEP, using the following expression:
(1-D) x 'v_IN
ESR_MIN = _{2 x ISTEP}
(31)
For this example the maximum load step is equal to the load current, or 0.5A. The maximum permissible ΔV_IN
during load transients is 4%_P-P. ΔV_IN and duty cycle are taken at minimum input voltage to give the worst-case
value:
ESR_MIN = [(1 – 0.77) × 0.36] / (2 × 0.5) = 83 mΩ
(32)
The minimum input capacitance can be selected based on ΔV_IN, based on the drop in V_IN during a load transient,
or based on prevention of power supply interaction. In general, the requirement for greatest capacitance comes
from the power supply interaction. The inductance and resistance of the input source must be estimated, and if
this information is not available, they can be assumed to be 1 µH and 0.1 Ω, respectively. Minimum capacitance
is then estimated as:
2 x L_S x V_O x I_O
C_MIN = _{VIN2 x RS}
(33)
As with ESR, the worst-case, highest minimum capacitance calculation comes at the minimum input voltage.
Using the default estimates for L_S and R_S, minimum capacitance is:
2 x 1P x 40 x 0.5
C_MIN =
9² x 0.1
= 4.9 PF
(34)
The next highest standard 20% capacitor value is 6.8 µF, but because the actual input source impedance and
resistance are not known, two 4.7 µF capacitors will be used. In general, doubling the calculated value of input
capacitance provides a good safety margin. The final calculation is for the RMS current. For boost converters
operating in CCM this can be estimated as:
I_RMS = 0.29 × Δi_L(MAX)
(35)
From the inductor section, maximum inductor ripple current is 0.58 A, hence the input capacitor(s) must be rated
to handle 0.29 × 0.58 = 170 mA_RMS.
The input capacitors can be ceramic, tantalum, aluminum, or almost any type, however the low capacitance
requirement makes ceramic capacitors particularly attractive. As with the output capacitors, the minimum quality
dielectric used should X5R, with X7R or better preferred. The voltage rating for input capacitors need not be as
conservative as the output capacitors, as the need for capacitance decreases as input voltage increases. For this
example, the capacitor selected will be 4.7 µF ±20%, rated to 50 V, in the 1812 case size. The RMS current
rating of these capacitors is over 2A each, more than enough for this application.
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