OPA170-EP Datasheet, PDF (2/20 Pages) Texas Instruments – 36-V, SINGLE-SUPPLY, LOW-POWER OPERATIONAL AMPLIFIER

OPA170-EP
SBOS598A – DECEMBER 2012 – REVISED DECEMBER 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
T_A
–40°C to 150°C
PACKAGE
SOT553-5 - DRL
ORDERING INFORMATION⁽¹⁾
ORDERABLE PART NUMBER
TOP-SIDE MARKING
OPA170ASDRLTEP
SHN
VID NUMBER
V62/12627-01XE
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
PIN CONFIGURATIONS
DRL PACKAGE
SOT553-5
(TOP VIEW)
IN+ 1
V- 2
IN- 3
5 V+
4 OUT
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
Over operating free-air temperature range, unless otherwise noted.
Supply voltage
Signal input terminals
Output short circuit⁽²⁾
Voltage
Current
Operating temperature
Storage temperature
Junction temperature
ESD ratings
Human body model (HBM)
Charged device model (CDM)
±20, +40 (single supply)
(V–) – 0.5 to (V+) + 0.5
±10
Continuous
–40 to +150
–65 to +150
+150
4
750
UNIT
V
V
mA
°C
°C
°C
kV
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) Short-circuit to ground, one amplifier per package.
THERMAL INFORMATION
THERMAL METRIC⁽¹⁾
θ_JA
θ_JC(top)
θ_JB
ψ_JT
ψ_JB
θ_JC(bottom)
Junction-to-ambient thermal resistance
Junction-to-case(top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case(bottom) thermal resistance
OPA170
DRL (SOT553)
5 PINS
226.8
80.3
42.9
3.2
42.5
N/A
UNITS
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2
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