ONET8521T Datasheet, PDF (2/16 Pages) Texas Instruments – 11.3 Gbps Limiting Transimpedance Amplifier With RSSI

ONET8521T
SLLSE87A – JULY 2011 – REVISED AUGUST 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
BLOCK DIAGRAM
A simplified block diagram of the ONET8521T is shown in Figure 1.
The ONET8521T consists of the signal path, supply filters, a control block for dc input bias, automatic gain
control (AGC) and received signal strength indication (RSSI). The RSSI provides the bias for the TIA stage and
the control for the AGC.
The signal path consists of a transimpedance amplifier stage, a voltage amplifier, and a CML output buffer. The
on-chip filter circuit provides a filtered V_CC for the PIN photodiode and for the transimpedance amplifier.
The dc input bias circuit and automatic gain control use internal low pass filters to cancel the dc current on the
input and to adjust the transimpedance amplifier gain. Furthermore, circuitry is provided to monitor the received
signal strength.
VCC_OUT
VCC_IN
To Voltage Amplifier and Output Buffer
To TIA
GND
FILTER1/2
220 W
RF
AGC and DC
Offset
Cancellation
RSSI_IB
OUT+
IN
OUT-
TIA
Voltage Amplifier
CML Output Buffer
Figure 1. Simplified Block Diagram of the ONET8521T
RSSI_EB
2
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