LP2995 Datasheet, PDF (2/24 Pages) National Semiconductor (TI) – DDR Termination Regulator

LP2995
SNVS190M – FEBRUARY 2002 – REVISED MARCH 2013
Connection Diagram
NC 1
GND 2
VSENSE ₃
VREF 4
8 V_TT
7 PVIN
6 AVIN
5 VDDQ
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N/C
GND
N/C
N/C
16 15 14 13
1
12
2
11
GND
3
10
4
9
5678
PVIN
PVIN
AVIN
N/C
Figure 1. SOIC-8 (D0008A) Package
Top View
Figure 2. NHP- 16 Package
Top View
SOIC-8 Pin or SO
PowerPAD-8 Pin
1
2
3
4
5
6
7
8
NC 1
GND 2
V_SENSE 3
V_REF 4
GND
8 V_TT
7 PVIN
6 AVIN
5 V_DDQ
Figure 3. SO PowerPAD-8 (DDA0008A) Package
Top View
WQFN Pin
1,3,4,6,9, 13,16
2
5
7
8
10
11, 12
14, 15
EP
PIN DESCRIPTIONS
Name
Function
NC
GND
VSENSE
VREF
VDDQ
AVIN
PVIN
VTT
EP
No internal connection. Can be used for vias.
Ground.
Feedback pin for regulating VTT.
Buffered internal reference voltage of VDDQ/2.
Input for internal reference equal to VDDQ/2.
Analog input pin.
Power input pin.
Output voltage for connection to termination resistors.
Exposed pad thermal connection. Connect to Ground.
2
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