LM3409MY-NOPB Datasheet, PDF (2/43 Pages) Texas Instruments – PFET Buck Controller for High Power LED Drivers

LM3409, LM3409HV, LM3409-Q1
SNVS602J – MARCH 2009 – REVISED MAY 2013
Connection Diagram
LM3409/09Q/09HV/09QHV
LM3409N
www.ti.com
1 _UVLO
VIN ¹⁰
2 _IADJ
VCC ⁹
3 _EN
DAP CSP ⁸
4 _COFF
CSN ⁷
5 _GND
PGATE ⁶
1 _UVLO
2 _NC
3 _IADJ
4 _EN
5 _COFF
6 _GND
7 _NC
VIN ¹⁴
NC ¹³
VCC ¹²
CSP ¹¹
CSN ¹⁰
PGATE ⁹
NC ⁸
Figure 1. 10-Lead VSSOP Package
Figure 2. 14-Lead PDIP Package
Pins
PDIP VSSOP
1
1
Name
UVLO
3
2
IADJ
4
3
EN
5
4
COFF
6
5
GND
9
6
PGATE
10
7
CSN
11
8
CSP
12
9
VCC
14
10
DAP
VIN
DAP
PIN DESCRIPTIONS
Description
Application Information
Input under-voltage lockout
Analog LED current adjust
Logic level enable /
PWM dimming
Off-time programming
Ground
Gate drive
Negative current sense
Positive current sense
V_IN- referenced
linear regulator output
Input voltage
Thermal pad on bottom of IC
Connect to a resistor divider from V_IN and GND. Turn-on
threshold is 1.24V and hysteresis for turn-off is provided by a
22µA current source.
Apply a voltage between 0 - 1.24V, connect a resistor to GND, or
leave open to set the current sense threshold voltage.
Apply a voltage >1.74V to enable device, a PWM signal to dim, or
a voltage <0.5V for low power shutdown.
Connect resistor from V_O, capacitor to GND to set off-time.
Connect to system ground.
Connect to gate of external PFET.
Connect to negative side of sense resistor.
Connect to positive side of sense resistor (also to VIN).
Connect at least a 1µF ceramic capacitor to V_IN. The regulator
provides power for the PFET drive.
Connect to the input voltage.
Connect to GND pin. Place 4-6 vias from DAP to GND plane.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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