LM3409MY-NOPB Datasheet, PDF (19/43 Pages) Texas Instruments – PFET Buck Controller for High Power LED Drivers

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LM3409, LM3409HV, LM3409-Q1
SNVS602J – MARCH 2009 – REVISED MAY 2013
I_LED
V_DD > 1.6V
LM3409/09HV
R_EXT
Dim
FET
C_EXT
EN
V_DD
Gate
Driver
PWM
Figure 31. External Parallel FET Dimming Circuit
As shown in Figure 31, a small capacitor (C_EXT) is connected from the gate drive signal of the parallel Dim FET
to the EN pin and a pull-up resistor (R_EXT) is placed from the EN pin to the external V_DD supply for the Dim FET
gate driver. This forces the on-timer to restart corresponding to every rising edge of the LED voltage, ensuring
that the unwanted maximum off-time condition does not occur. With this type of dimming, the EN pin does not
control the dimming; it simply resets the controller. A good design choice is to size R_EXT and C_EXT to give a time
constant smaller than t_OFF:
t_{OFF >} R_EXT x C_EXT
(27)
The ideal LED current waveform i_LED(t) during parallel FET PWM dimming is very similar to the EN pin PWM
dimming shown previously. The LED current does not rise and fall infinitely fast as shown in Figure 30 however
with this method, only the speed of the parallel Dim FET ultimately limits the dimming frequency and dimming
duty cycle. This allows for much faster PWM dimming than can be attained with the EN pin.
CIRCUIT LAYOUT
The performance of any switching converter depends as much upon the layout of the PCB as the component
selection. Following a few simple guidelines will maximimize noise rejection and minimize the generation of EMI
within the circuit.
Discontinuous currents are the most likely to generate EMI, therefore care should be taken when routing these
paths. The main path for discontinuous current in the LM3409/09HV buck converter contains the input capacitor
(C_IN), the recirculating diode (D1), the P-channel MosFET (Q1), and the sense resistor (R_SNS). This loop should
be kept as small as possible and the connections between all three components should be short and thick to
minimize parasitic inductance. In particular, the switch node (where L1, D1 and Q1 connect) should be just large
enough to connect the components without excessive heating from the current it carries.
The IADJ, COFF, CSN and CSP pins are all high-impedance control inputs which couple external noise easily,
therefore the loops containing these high impedance nodes should be minimized. The most sensitive loop
contains the sense resistor (R_SNS) which should be placed as close as possible to the CSN and CSP pins to
maximize noise rejection. The off-time capacitor (C_OFF) should be placed close to the COFF and GND pins for
the same reason. Finally, if an external resistor (R_EXT) is used to bias the IADJ pin, it should be placed close to
the IADJ and GND pins, also.
In some applications the LED or LED array can be far away (several inches or more) from the LM3409/09HV, or
on a separate PCB connected by a wiring harness. When an output capacitor is used and the LED array is large
or separated from the rest of the converter, the output capacitor should be placed close to the LEDs to reduce
the effects of parasitic inductance on the AC impedance of the capacitor.
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