BQ25070 Datasheet, PDF (2/21 Pages) Texas Instruments – 1A, Single-Input, Single-Cell LiFePO4 Linear Battery Charger with 50mA LDO

bq25070
SLUSA66 – JULY 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
PART NUMBER
bq25070DQCR
bq25070DQCT
I_LIM(DEF)
300 mA
300 mA
ORDERING INFORMATION⁽¹⁾
V_BAT(OVCH)
3.7 V
V_BAT(FLOAT)
3.5 V
3.7 V
3.5 V
V_OVP
10.5 V
10.5 V
V_LDO
4.9 V
4.9 V
MARKING
QUS
QUS
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder on ti.com (www.ti.com),
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
Input Voltage
IN (with respect to GND)
CTRL, TS (with respect to GND)
–0.3 to 30
V
–0.3 to 7
V
Output Voltage
BAT, OUT, LDO, CHG, IMON (with respect to GND)
–0.3 to 7
V
Input Current (Continuous)
IN
1.2
A
Output Current (Continuous) BAT
1.2
A
Output Current (Continuous) LDO
100
mA
Output Sink Current
CHG
5
mA
Junction temperature, T_J
Storage temperature, T_STG
–40 to 150
°C
–65 to 150
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
THERMAL INFORMATION
THERMAL METRIC⁽¹⁾
bq25070
SON
UNITS
θ_JA
θ_JCtop
Junction-to-ambient thermal resistance⁽²⁾
Junction-to-case (top) thermal resistance⁽³⁾
10 PINS
58.7
3.9
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
RECOMMENDED OPERATING CONDITIONS
IN voltage range
V_{IN IN operating voltage range}
I_IN Input current, IN
I_OUT Output Current in charge mode, OUT
T_J Junction Temperature
(1) Charge current may be limited at low input voltages due to the dropout of the device.
MIN
3.75 ⁽¹⁾
3.75 ⁽¹⁾
0
MAX
28
10.2
1
1
125
UNITS
V
A
A
°C
2
Copyright © 2011, Texas Instruments Incorporated