BQ24133 Datasheet, PDF (2/35 Pages) Texas Instruments – 1.6-MHz Synchronous Switch-Mode Li-Ion and Li-Polymer Stand-Alone Battery Charger with Integrated MOSFETs and Power Path Selector

bq24133
SLUSAF7B – DECEMBER 2010 – REVISED MAY 2011
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
The bq24133 provides power path selector gate driver ACDRV/CMSRC on input NMOS pair ACFET (Q1) and
RBFET (Q2), and BATDRV on a battery PMOS device (Q3). When the qualified adapter is present, the system is
directly connected to the adapter. Otherwise, the system is connected to the battery. In addition, the power path
prevents battery from boosting back to the input.
The bq24170/172 charges the battery from a DC source as high as 17V, including a car battery. The input
over-voltage limit is adjustable through the OVPSET pin. The AVCC, ACP, and ACN pins have a 30V rating.
When a high voltage DC source is inserted, Q1/Q2 remain off to avoid high voltage damage to the system.
For 1 cell applications, if the battery is not removable, the system can be directly connected to the battery to
simplify the power path design and lower the cost. With this configuration, the battery can automatically
supplement the system load if the adapter is overloaded.
The bq24133 is available in a 24-pin, 3.5mmx5.5 mm thin QFN package.
RGY PACKAGE
(TOP VIEW)
PVCC ²
PVCC ³
AVCC ⁴
ACN ⁵
ACP ⁶
CMSRC ⁷
ACDRV ⁸
STAT ⁹
TS ¹⁰
TTC ¹¹
1
24
AGND
12
13
23 _PGND
22 _PGND
21 _BTST
20 _REGN
19 _BATDRV
18 _OVPSET
17 _ACSET
16 _SRP
15 _SRN
14 _CELL
PIN
NO.
NAME
1,24 SW
2,3 PVCC
4
AVCC
5
ACN
6
ACP
7
CMSRC
PIN FUNCTIONS
TYPE
DESCRIPTION
P Switching node, charge current output inductor connection. Connect the 0.047-µF bootstrap capacitor
from SW to BTST.
P Charger input voltage. Connect at least 10-µF ceramic capacitor from PVCC to PGND and place it as
close as possible to IC.
P IC power positive supply. Place a 1-µF ceramic capacitor from AVCC to AGND and place it as close as
possible to IC. Place a 10-Ω resistor from input side to AVCC pin to filter the noise. For 5V input, a 5-Ω
resistor is recommended.
I Adapter current sense resistor negative input. A 0.1-µF ceramic capacitor is placed from ACN to ACP to
provide differential-mode filtering. An optional 0.1-µF ceramic capacitor is placed from ACN pin to AGND
for common-mode filtering.
P/I Adapter current sense resistor positive input. A 0.1-µF ceramic capacitor is placed from ACN to ACP to
provide differential-mode filtering. A 0.1-µF ceramic capacitor is placed from ACP pin to AGND for
common-mode filtering.
O Connect to common source of N-channel ACFET and reverse blocking MOSFET (RBFET). Place 4-kΩ
resistor from CMSRC pin to the common source of ACFET and RBFET to control the turn-on speed. The
resistance between ACDRV and CMSRC should be 500-kΩ or bigger.
2
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