LM36010 Datasheet, PDF (19/37 Pages) Texas Instruments – Synchronous-Boost, Single-LED Flash Driver With 1.5-A High-Side Current Source

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LM36010
SNVSAN4A – APRIL 2017 – REVISED JULY 2017
7.5.2.3 Transferring Data
Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) transferred first. Each
byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the
master. The master releases the SDA line (HIGH) during the acknowledge clock pulse. The LM36010 pulls down
the SDA line during the 9th clock pulse, signifying an acknowledge. The LM36010 generates an acknowledge
after each byte is received. There is no acknowledge created after data is read from the device.
After the START condition, the I²C master sends a chip address. This address is seven bits long followed by an
eighth bit which is a data direction bit (R/W). The LM36010 7-bit address is 0x64. For the eighth bit, a 0 indicates
a WRITE, and a 1 indicates a READ. The second byte selects the register to which the data is written. The third
byte contains data to write to the selected register.
ack from
slave
ack from
slave
ack from
slave
start
msb Chip
Address lsb
w ack msb Register Add lsb ack msb DATA lsb ack stop
SCL
SDA
start
Id = 64h
w ack
addr = 01h
ack
Data = 03h
ack stop
Figure 35. Write Cycle W = Write (SDA = 0) R = Read (SDA = 1) Ack = Acknowledge
(SDA Pulled Down by Either Master or Slave) ID = Chip Address, 64h for LM36010
7.5.2.4 I²C-Compatible Chip Address
The device address for the LM36010 is 1100100 (0x64). After the START condition, the I²C-compatible master
sends the 7-bit address followed by an eighth read or write bit (R/W). R/W = 0 indicates a WRITE and R/W = 1
indicates a READ. The second byte following the device address selects the register address to which the data is
written. The third byte contains the data for the selected register.
MSB
LSB
1
Bit 7
1
Bit 6
0
Bit 5
0
Bit 4
1
Bit 3
0
Bit 2
0
Bit 1
R/W
Bit 0
I²C Slave Address (chip address)
Figure 36. I²C-Compatible Chip Address
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