BQ27520-G4 Datasheet, PDF (19/34 Pages) Texas Instruments – System-Side Impedance Track Fuel Gauge

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Attempt to read an address above 0x6B (NACK command):
bq27520-G4
SLUSB20B – NOVEMBER 2012 – REVISED DECEMBER 2015
Figure 10. Invalid Read
8.5.3.2 I²C Time Out
The I²C engine releases both SDA and SCL if the I²C bus is held low for 2 seconds. If the fuel gauge was
holding the lines, releasing them frees them for the master to drive the lines. If an external condition is holding
either of the lines low, the I²C engine enters the low-power sleep mode.
8.5.3.3 I²C Command Waiting Time
To ensure proper operation at 400 kHz, a t_(BUF) ≥ 66 μs bus free waiting time must be inserted between all
packets addressed to the fuel gauge. In addition, if the SCL clock frequency (f_SCL) is > 100 kHz, use individual 1-
byte write commands for proper data flow control. The following diagram shows the standard waiting time
required between issuing the control subcommand the reading the status result. An OCV_CMD subcommand
requires 1.2 seconds prior to reading the result. For read-write standard command, a minimum of 2 seconds is
required to get the result updated. For read-only standard commands, there is no waiting time required, but the
host should not issue all standard commands more than two times per second. Otherwise, the fuel gauge could
result in a reset issue due to the expiration of the watchdog timer.
S ADDR [6:0] 0 A CMD [7:0] A DATA [7:0] A P 66ms
S ADDR [6:0] 0 A CMD [7:0] A DATA [7:0] A P 66ms
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0]
Waiting time inserted between two 1-byte write packets for a subcommand and reading results
(required for 100 kHz < f_SCL £ 400 kHz)
NP
66ms
S ADDR [6:0] 0 A CMD [7:0] A DATA [7:0] A DATA [7:0] A P 66ms
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0] N P
Waiting time inserted between incremental 2-byte write packet for a subcommand and reading results
(acceptable for f_SCL £ 100 kHz)
66ms
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0] A
DATA [7:0] A DATA [7:0] N P 66ms
Waiting time inserted after incremental read
Figure 11. Standard I²C Command Waiting Time Required
8.5.3.4 I²C Clock Stretching
A clock stretch can occur during all modes of fuel gauge operation. In SLEEP and HIBERNATE modes, a short
clock stretch occurs on all I²C traffic as the device must wake-up to process the packet. In the other modes (BAT
INSERT CHECK, NORMAL, SNOOZE) clock stretching only occurs for packets addressed for the fuel gauge.
The majority of clock stretch periods are small as the I²C interface performs normal data flow control. However,
less frequent yet more significant clock stretch periods may occur as blocks of Data Flash are updated. The
following table summarizes the approximate clock stretch duration for various fuel gauge operating conditions.
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