TMS320F28069_17 Datasheet, PDF (18/177 Pages) Texas Instruments – Piccolo Microcontrollers

TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698F – NOVEMBER 2010 – REVISED MARCH 2016
www.ti.com
Table 4-1. Signal Descriptions⁽¹⁾ (continued)
PIN NAME
PIN NO.
PZ
PN
PZP
PFP
I/O/Z
DESCRIPTION
GPIO44
I/O/Z General-purpose input/output 44
MFSRA
SCIRXDB
I/O McBSP receive frame synch
56
–
I
SCI-B receive data
EPWM7B
O Enhanced PWM7 output B
GPIO50
I/O/Z General-purpose input/output 50
EQEP1A
MDXA
I
Enhanced QEP1 input A
42
–
O McBSP transmit serial data
TZ1
I
Trip zone input 1
GPIO51
I/O/Z General-purpose input/output 51
EQEP1B
MDRA
48
–
I
Enhanced QEP1 input B
I
McBSP receive serial data
TZ2
I
Trip zone input 2
GPIO52
I/O/Z General-purpose input/output 52
EQEP1S
MCLKXA
I/O Enhanced QEP1 strobe
53
–
I/O McBSP transmit clock
TZ3
I
Trip zone input 3
GPIO53
I/O/Z General-purpose input/output 53
EQEP1I
65
–
I/O Enhanced QEP1 index
MFSXA
I/O McBSP transmit frame synch
GPIO54
I/O/Z General-purpose input/output 54
SPISIMOA
EQEP2A
I/O SPI-A slave in, master out
69
–
I
Enhanced QEP2 input A
HRCAP1
I
High-Resolution Input Capture 1
GPIO55
I/O/Z General-purpose input/output 55
SPISOMIA
EQEP2B
I/O SPI-A slave out, master in
75
–
I
Enhanced QEP2 input B
HRCAP2
I
High-Resolution Input Capture 2
GPIO56
I/O/Z General-purpose input/output 56
SPICLKA
EQEP2I
I/O SPI-A clock input/output
85
–
I/O Enhanced QEP2 index
HRCAP3
I
High-Resolution Input Capture 3
GPIO57
I/O/Z General-purpose input/output 57
SPISTEA
EQEP2S
I/O SPI-A slave transmit enable input/output
89
–
I/O Enhanced QEP2 strobe
HRCAP4
I
High-Resolution Input Capture 4
GPIO58
I/O/Z General-purpose input/output 58
MCLKRA
SCITXDB
I/O McBSP receive clock
94
–
O SCI-B transmit data
EPWM7A
O Enhanced PWM7 output A and HRPWM channel
(1) I = Input, O = Output, Z = High Impedance, OD = Open Drain, ↑ = Pullup, ↓ = Pulldown
(2) The GPIO function (shown in bold italics) is the default at reset. The peripheral signals that are listed under them are alternate functions.
For JTAG pins that have the GPIO functionality multiplexed, the input path to the GPIO block is always valid. The output path from the
GPIO block and the path to the JTAG block from a pin is enabled or disabled based on the condition of the TRST signal. See the
Systems Control and Interrupts chapter of the TMS320x2806x Piccolo Technical Reference Manual (SPRUH18).
(3) Depending on your USB application, additional pins may be required to maintain compliance with the USB 2.0 Specification. For more
information, see the Universal Serial Bus (USB) Controller chapter of the TMS320x2806x Piccolo Technical Reference Manual
(SPRUH18).
18
Terminal Configuration and Functions
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TMS320F28064 TMS320F28063 TMS320F28062