TLC5945_16 Datasheet, PDF (18/30 Pages) Texas Instruments – 16-CHANNEL LED DRIVER WITH DOT CORRECTION AND GRAYSCALE PWM CONTROL

TLC5945
SLVS755 – MARCH 2007
www.ti.com
each output OUTn with the grayscale counter value. All OUTn with grayscale values equal to the counter values
are switched off. A BLANK=H signal after 4096 GSCLK pulses resets the grayscale counter to zero and
completes the grayscale PWM cycle (see Figure 15). When the counter reaches a count of FFFh, the counter
stops counting and all outputs turn off. Pulling BLANK high before the counter reaches FFFh immediately resets
the counter to zero.
BLANK
GS PWM
Cycle n
GS PWM
Cycle n+1
GSCLK
OUT0
(Current)
OUT1
(Current)
t_pd1
t_wl1
t_wh1
1
2
t_wl1
t_pd3
3
t_pd3
t_h4
4096
t_wh3
t_pd3
t_su4
1
OUT15
(Current)
t_pd2
XERR
Figure 15. Grayscale PWM Cycle Timing Chart
SERIAL DATA TRANSFER RATE
Figure 16 shows a cascading connection of n TLC5945 devices connected to a controller, building a basic
module of an LED display system. There is no TLC5945 limitation to the maximum number of ICs that can be
cascaded. The maximum number of cascading TLC5945 devices depends on the application system and is in
the range of 40 devices. Equation 10 calculates the minimum frequency needed:
f(GSCLK) + 4096 f(update)
f(SCLK) + 193 f(update) n
(10)
where:
f_(GSCLK): minimum frequency needed for GSCLK
f_(SCLK): minimum frequency needed for SCLK and SIN
f_(update): update rate of whole cascading system
n: number cascaded of TLC5945 device
18
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