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TLC5926_15 Datasheet, PDF (18/39 Pages) Texas Instruments – 16-Channel Constant-Current LED Sink Drivers
TLC5926, TLC5927
SLVS677C – JULY 2008 – REVISED OCTOBER 2015
www.ti.com
9.4.3.1 Reading Error Status Code in Special Mode
When OE(ED2) is pulled low while in Special mode, error detection and load error status codes are loaded into
the Shift Register, in addition to enabling output ports to sink current. Figure 13 shows the timing sequence for
error detection. The 0 and 1 signal levels are sampled at the rising edge of each CLK. At least three zeros must
be sampled at the voltage low signal OE(ED2). Immediately after the second 0 is sampled, the data input source
of the Shift Register changes to the 16-bit parallel Error Status Code register, instead of from the serial data on
SDI. Normally, the error status codes are generated at least 2 μs after the falling edge of OE(ED2). The
occurrence of the third or later 0 saves the detected error status codes into the Shift Register. Therefore, when
OE(ED2) is low, the serial data cannot be shifted into TLC592x through SDI. When OE(ED2) is pulled high, the
data input source of the Shift Register is changed back to SDI. At the same time, the output ports are disabled
and the error detection is completed. Then, the error status codes saved in the Shift Register can be shifted out
through SDO bit-by-bit along with CLK. Additionally, the new serial data can be shifted into TLC592x through
SDI.
While in Special mode, the TLC592x cannot simultaneously transfer serial data and detect LED load error status.
CLK
1
2
3
>2 µs
OE(ED2) 1
0
0
0
0
0
1
1
1
1
LE(ED1) 0
0
0
0
0
0
0
0
0
0
SDO
Data source of
shift register
Error Status Code
Bit 15 Bit 14 Bit 13 Bit 12
SDI
Error Detection
SDI
Figure 13. Reading Error Status Code
9.4.4 Writing Configuration Code in Special Mode
When in Special mode, the active high signal LE(ED1) latches the serial data in the Shift Register to the
Configuration Latch, instead of the Output Latch. The latched serial data is used as the Configuration Code.
The code is stored until power off or the Configuration Latch is rewritten. As shown in Figure 14, the timing for
writing the Configuration Code is the same as the timing in the Normal Mode to latching output channel data.
Both the Configuration Code and Error Status Code are transferred in the common 16-bit Shift Register. Users
must pay attention to the sequence of error detection and current adjustment to avoid the the Error Status Code
overwriting the Configuration Code.
0
1
2
3
4
CLK
12 13 14 15
OE(ED2) 1
LE(ED1) 0
Bit 15 Bit 14 Bit 13 Bit 12
Bit 3 Bit 2 Bit 1 Bit 0
SDI
16-Bit Configuration Code
Figure 14. Writing Configuration Code
18
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