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DS40MB200_17 Datasheet, PDF (18/26 Pages) Texas Instruments – Dual 4-Gbps 2:1/1:2 CML MUX/Buffer With Transmit Pre-Emphasis and Receive Equalization
DS40MB200
SNLS144J – JUNE 2005 – REVISED JANUARY 2016
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10 Power Supply Recommendations
The supply (VCC) and ground (GND) pins must be connected to power planes routed on adjacent layers of the
printed circuit board. The layer thickness of the dielectric must be minimized so that the VCC and GND planes
create a low inductance supply with distributed capacitance. Careful attention to supply bypassing through the
proper use of bypass capacitors is required. A 0.01-μF or 0.1-μF bypass capacitor must be connected to each
VCC pin such that the capacitor is placed as close to the VCC pins as possible. Smaller body-size capacitors, such
as 0402 body size, can help facilitate proper component placement. Refer to the VCC pin connections in
Figure 10 for further details.
11 Layout
11.1 Layout Guidelines
Use at least a four-layer board with a power and ground plane. Closely coupled differential lines of 100 Ω are
typically recommended for differential interconnect. The closely coupled lines help to ensure that coupled noise
will appear as common-mode and thus will be rejected by the receivers. Information on the WQFN style package
is provided in AN-1187 Leadless Leadframe Package (LLP) (SNOA401).
11.2 Layout Examples
Stencil parameters such as aperture area ratio and the fabrication process have a significant impact on paste
deposition. Inspection of the stencil prior to placement of the WQFN package is highly recommended to improve
board assembly yields. If the via and aperture openings are not carefully monitored, the solder may flow
unevenly through the DAP. Stencil parameters for aperture opening and via locations are shown in Figure 18. A
layout example for the DS40MB200 DAP is shown in Figure 19, where 16 stencil openings are used for the DAP
alongside nine vias to GND.
Figure 18. No Pullback WQFN, Single Row Reference Diagram
DEVICE
DS40MB200
Table 6. No Pullback WQFN Stencil Aperture Summary for DS40MB200
PIN
COUNT
MKT DWG
PCB I/O
PAD SIZE
(mm)
48
SQA48A 0.25 × 0.6
PCB
PITCH
(mm)
0.5
PCB DAP
SIZE (mm)
5.1 × 5.1
STENCIL I/O
APERTURE
(mm)
0.25 × 0.7
STENCIL DAP
APERTURE
(mm)
1.1 × 1.1
NUMBER
OF DAP
APERTURE
OPENINGS
16
GAP BETWEEN
DAP APERTURE
(Dim A mm)
0.2
18
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