DS40MB200_17 Datasheet, PDF (1/26 Pages) Texas Instruments – Dual 4-Gbps 2:1/1:2 CML MUX/Buffer With Transmit Pre-Emphasis and Receive Equalization

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DS40MB200
SNLS144J – JUNE 2005 – REVISED JANUARY 2016
DS40MB200 Dual 4-Gbps 2:1/1:2 CML MUX/Buffer With Transmit Pre-Emphasis and
Receive Equalization
1 Features
•1 1-Gbps to 4-Gbps Low Jitter Operation
• Fixed Input Equalization
• Programmable Output Pre-Emphasis
• Independent Switch and Line Side Pre-Emphasis
Controls
• Programmable Switch-Side Loopback Mode
• On-Chip Terminations
• 3.3-V Supply
• ESD Rating of 6-kV HBM
• 48-leadless WQFN Package (7 mm × 7 mm)
• 0°C to +85°C Operating Temperature Range
2 Applications
• Backplane or Cable Driver
• Redundancy and Signal Conditioning Applications
• XAUI
3 Description
The DS40MB200 device is a dual signal conditioning
2:1 multiplexer (MUX) and 1:2 fan-out buffer designed
for use in backplane-redundancy applications. Signal
conditioning features include continuous time linear
equalization (CTLE) and programmable output pre-
emphasis, extending data communication in FR4
backplanes at rates up to 4 Gbps. Each input stage
has a fixed equalizer to reduce intersymbol
interference distortion from board traces.
All output drivers have four selectable steps of pre-
emphasis to compensate for transmission losses from
long FR4 backplanes and reduce deterministic jitter.
The pre-emphasis levels can be independently
controlled for the line-side and switch-side drivers.
The internal loopback paths from switch-side input to
switch-side output enable at-speed system testing. All
receiver inputs are internally terminated with 100-Ω
differential terminating resistors. All drivers are
internally terminated with 50 Ω to V_CC.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DS40MB200
WQFN (48)
7.00 mm × 7.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Block Diagram
LO_0 ±
MUX_S0
PRE_L
LI_0 ±
EQ
Port 0
EQ
EQ
PRE_S
PRE_S
SIA_0 ±
SIB_0 ±
LB0A
SOA_0 ±
SOB_0 ±
LB0B
LO_1 ±
MUX_S1
PRE_L
LI_1 ±
EQ
Port 1
EQ
EQ
PRE_S
PRE_S
SIA_1 ±
SIB_1 ±
LB1A
SOA_1 ±
SOB_1 ±
LB1B
PreL_0
PreL_1
PreS_0
PreS_1
Pre-emphasis
Control
PRE_L
PRE_S
VCC
GND
RSV
All CML inputs and outputs must be AC coupled for optimal performance.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.