LM3S1918_16 Datasheet, PDF (178/637 Pages) Texas Instruments – Stellaris LM3S1918 Microcontroller

System Control
Note: Spaces in the System Control register space that are not used are reserved for future or
internal use. Software should not modify any reserved memory address.
Table 5-7. System Control Register Map
Offset Name
Type
Reset
Description
0x000 DID0
0x004 DID1
0x008 DC0
0x010 DC1
0x014 DC2
0x018 DC3
0x01C DC4
0x030 PBORCTL
0x034 LDOPCTL
0x040 SRCR0
0x044 SRCR1
0x048 SRCR2
0x050 RIS
0x054 IMC
0x058 MISC
0x05C RESC
0x060 RCC
0x064 PLLCFG
0x070 RCC2
0x100 RCGC0
0x104 RCGC1
0x108 RCGC2
0x110 SCGC0
0x114 SCGC1
0x118 SCGC2
0x120 DCGC0
0x124 DCGC1
0x128 DCGC2
0x144 DSLPCLKCFG
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
RO
R/W
R/W1C
R/W
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
0x00FF.007F
0x0001.32FF
0x030F.5033
0xBFFF.0FC0
0x0000.C0FF
0x0000.7FFD
0x0000.0000
0x00000000
0x00000000
0x00000000
0x0000.0000
0x0000.0000
0x0000.0000
-
0x0780.3AD1
-
0x0780.2810
0x00000040
0x00000000
0x00000000
0x00000040
0x00000000
0x00000000
0x00000040
0x00000000
0x00000000
0x0780.0000
Device Identification 0
Device Identification 1
Device Capabilities 0
Device Capabilities 1
Device Capabilities 2
Device Capabilities 3
Device Capabilities 4
Brown-Out Reset Control
LDO Power Control
Software Reset Control 0
Software Reset Control 1
Software Reset Control 2
Raw Interrupt Status
Interrupt Mask Control
Masked Interrupt Status and Clear
Reset Cause
Run-Mode Clock Configuration
XTAL to PLL Translation
Run-Mode Clock Configuration 2
Run Mode Clock Gating Control Register 0
Run Mode Clock Gating Control Register 1
Run Mode Clock Gating Control Register 2
Sleep Mode Clock Gating Control Register 0
Sleep Mode Clock Gating Control Register 1
Sleep Mode Clock Gating Control Register 2
Deep Sleep Mode Clock Gating Control Register 0
Deep Sleep Mode Clock Gating Control Register 1
Deep Sleep Mode Clock Gating Control Register 2
Deep Sleep Clock Configuration
See
page
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205
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228
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231
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226
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July 16, 2014
Texas Instruments-Production Data