TMS320C6455_17 Datasheet, PDF (175/256 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320C6455
www.ti.com
SPRS276M – MAY 2005 – REVISED MARCH 2012
7.12.3 HPI Electrical Data/Timing
Table 7-55. Timing Requirements for Host-Port Interface Cycles^{(1) (2)}
(see Figure 7-44 through Figure 7-51)
-720
-850
NO.
A-1000/-1000
-1200
MIN
MAX
9
t_{su(HASL-HSTBL)}
Setup time, HAS low before HSTROBE low
5
10
t_{h(HSTBL-HASL)}
Hold time, HAS low after HSTROBE low
2
11
t_{su(SELV-HASL)}
Setup time, select signals⁽³⁾ valid before HAS low
5
12
t_h(HASL-SELV)
Hold time, select signals⁽³⁾ valid after HAS low
5
13
t_w(HSTBL)
Pulse duration, HSTROBE low
15
14
t_w(HSTBH)
Pulse duration, HSTROBE high between consecutive accesses
2M
15
t_{su(SELV-HSTBL)}
Setup time, select signals⁽³⁾ valid before HSTROBE low
5
16
t_{h(HSTBL-SELV)}
Hold time, select signals⁽³⁾ valid after HSTROBE low
5
17
t_{su(HDV-HSTBH)}
Setup time, host data valid before HSTROBE high
5
18
t_h(HSTBH-HDV)
Hold time, host data valid after HSTROBE high
1
37
t_{su(HCSL-HSTBL)}
Setup time, HCS low before HSTROBE low
0
Hold time, HSTROBE low after HRDY low. HSTROBE should not be
38
t_{h(HRDYL-HSTBL)}
inactivated until HRDY is active (low); otherwise, HPI writes will not
1.1
complete properly.
(1) HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
(2) M = SYSCLK3 period = 6/CPU clock frequency in ns. For example, when running parts at 1000 MHz, use M = 6 ns.
(3) Select signals include: HCNTL[1:0] and HR/W. For HPI16 mode only, select signals also include HHWIL.
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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C64x+ Peripheral Information and Electrical Specifications 175
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