TAS5414B-Q1_16 Datasheet, PDF (17/46 Pages) Texas Instruments – FOUR-CHANNEL AUTOMOTIVE DIGITAL AMPLIFIERS

www.ti.com
TAS5414B-Q1
TAS5424B-Q1
SLOS673 – DECEMBER 2011
The user may restart the affected channel via I²C. An OCSD event activates the fault pin, and the affected
channel(s) are recorded in the I²C fault register. If the supply or ground short is strong enough to exceed the
peak current threshold but not severe enough to trigger the OCSD, the peak current limiter prevents excess
current from damaging the output FETs, and operation returns to normal after the short is removed.
3. DC Detect—This circuit detects a dc offset continuously during normal operation at the output of the
amplifier. If the dc offset reaches the level defined in the I²C registers for the specified time period, the circuit
triggers. By default a dc detection event does not shut the output down. The shutdown function can be
enabled or disabled via I²C. If enabled, the triggered channel shuts down, but the others remain playing and
the FAULT pin is asserted. The dc level is defined in I²C registers.
4. Clip Detect—The clip detect circuit alerts the user to the presence of a 100% duty-cycle PWM due to a
clipped waveform. When this occurs, a signal is passed to the CLIP_OTW pin and it is asserted until the
100% duty-cycle PWM signal is no longer present. All four channels are connected to the same CLIP_OTW
pin. Through I²C, the CLIP_OTW signal can be changed to clip-only, OTW-only, or both. A fourth mode,
used only during diagnostics, is the option to report tweeter detection events on this pin (see the Tweeter
Detection section). The microcontroller in the system can monitor the signal at the CLIP_OTW pin and may
be configured to reduce the volume to all four channels in an active clipping-prevention circuit.
5. Overtemperature Warning (OTW), Overtemperature Shutdown (OTSD) and Thermal Foldback—By
default, the CLIP_OTW pin is set to indicate an OTW. This can be changed via I²C commands. If selected to
indicate a temperature warning, the CLIP_OTW pin is asserted when the die temperature reaches warning
level 1 as shown in the electrical specs. The OTW has three temperature thresholds with a 10°C hysteresis.
Each threshold is indicated in I²C register 0x04 bits 5, 6, and 7. The device still functions until the
temperature reaches the OTSD threshold, at which time the outputs are placed into Hi-Z mode and the
FAULT pin is asserted. I²C is still active in the event of an OTSD and the registers can be read for faults, but
all audio ceases abruptly. After the OTSD resets the device can be turned back on through I²C. The OTW is
still indicated until the temperature drops below warning level 1. The Thermal Foldback decreases the
channel gain.
6. Undervoltage (UV) and Power-on-Reset (POR)—The undervoltage (UV) protection detects low voltages on
PVDD, AVDD, and CP. In the event of an undervoltage, the FAULT pin is asserted and the I²C register is
updated, depending on which voltage caused the event. Power-on-reset (POR) occurs when PVDD drops
low enough. A POR event causes the I²C to go into a high-impedance state. After the device recovers from
the POR event, the device must be re-initialized via I²C.
7. Overvoltage (OV) and Load Dump—The OV protection detects high voltages on PVDD. If PVDD reaches
the overvoltage threshold, the FAULT pin is asserted and the I²C register is updated. The device can
withstand 50-V load-dump voltage spikes. Also depicted in this graph are the voltage thresholds for normal
operation region, overvoltage operation region, and load-dump protection region. Figure 11 shows the
regions of operating voltage and the profile of the load dump event.
Power Supply
The power for the device is most commonly provided by a car battery that can have a large voltage range. PVDD
is a filtered battery voltage, and it is the supply for the output FETS and the low-side FET gate driver. The
high-side FET gate driver is supplied by a charge pump (CP) supply. The charge pump supplies the gate drive
voltage for all four channels. The analog circuitry is powered by AVDD, which is a provided by an internal linear
regulator. A 0.1μF/10V external bypass capacitor is needed at the A_BYP pin for this supply. It is recommended
that no external components except the bypass capacitor be attached to this pin. The digital circuitry is powered
by DVDD, which is provided by an internal linear regulator. A 0.1μF/10V external bypass capacitor is needed at
the D_BYP pin. It is recommended that no external components except the bypass capacitor be attached to this
pin.
The TAS5414B-Q1 and TAS5424B-Q1 can withstand fortuitous open ground and power conditions. Fortuitous
open ground usually occurs when a speaker wire is shorted to ground, allowing for a second ground path
through the body diode in the output FETs. The diagnostic capability allows the speakers and speaker wires to
be debugged, eliminating the need to remove the amplifier to diagnose the problem.
Copyright © 2011, Texas Instruments Incorporated
17