MSP430FG4619 Datasheet, PDF (17/114 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FG4619, MSP430FG4618, MSP430FG4617, MSP430FG4616
MSP430CG4619, MSP430CG4618, MSP430CG4617, MSP430CG4616
SLAS508J – APRIL 2006 – REVISED JUNE 2015
5.5 Thermal Characteristics
PARAMETER
PACKAGE
VALUE
UNIT
θ_JA
θ_JC,TOP
θ_JB
Junction-to-ambient thermal resistance, still air⁽¹⁾
Junction-to-case (top) thermal resistance⁽²⁾
Junction-to-board thermal resistance⁽³⁾
ZQW (S-PBGA-N113)
42
°C/W
10
°C/W
12
°C/W
Ψ_JB
Junction-to-board thermal characterization parameter
12
°C/W
Ψ_JT
θ_JA
θ_JC,TOP
θ_JB
Junction-to-top thermal characterization parameter
Junction-to-ambient thermal resistance, still air⁽¹⁾
Junction-to-case (top) thermal resistance⁽²⁾
Junction-to-board thermal resistance⁽³⁾
PZ (S-PQFP-G100)
0.3
°C/W
43.5
°C/W
6.2
°C/W
21.8
°C/W
Ψ_JB
Junction-to-board thermal characterization parameter
21.2
°C/W
Ψ_JT
Junction-to-top thermal characterization parameter
0.2
°C/W
(1) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(2) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(3) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
Copyright © 2006–2015, Texas Instruments Incorporated
Specifications
17
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