LP5952_15 Datasheet, PDF (17/29 Pages) Texas Instruments – 350mA Dual Rail Linear Regulator

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LM5050-1, LM5050-1-Q1
SNVS629E – MAY 2011 – REVISED DECEMBER 2015
Typical Applications (continued)
8.2.1.1 Design Requirements
Table 1 shows the parameters for Figure 24
Table 1. Design Parameters
DESIGN PARAMETER
Minimum Input Voltage, VIN_MIN
Maximum Input Voltage, VIN_Max
Output Current Range, IOUT
Ambient Temperature Range, T_A
EXAMPLE VALUE
6V
50 V
0 to 15 A
0°C to 50°C
8.2.1.2 Detailed Design Procedure
The following design procedure can be used to select component values for the LM5050-1.
8.2.1.2.1 Power Supply Components (R1 C1,) Selection
The LM5050-1 VS pin is the main supply pin for all internal biasing and an auxiliary supply for the internal gate
drive charge pump. The series resistor (R1) value should be low enough to keep the VS voltage drop at a
minimum. A typical series resistor value is 100 Ω. The capacitor value (0.1 uF typical) should be the lowest value
that produces acceptable filtering of the voltage noise.
8.2.1.2.2 MOSFET (Q1) Selection
The MOSFET (Q1) selection procedure is explained in detail in MOSFET Selection. The MOSFET used in the
design example is SUM40N10-30-E3.
8.2.1.2.3 D1 and D2 Selection for Inductive Kick-Back Protection
Diode D1 and capacitor C1 and diode D2 and capacitor C2 in the Figure 27 serve as inductive kick-back
protection to limit negative transient voltage spikes generated on the input when the input supply voltage is
abruptly shorted to zero volts. As a result, the LM5050-1 IN pin will see a negative voltage spike while the OUT
pin will see a positive voltage spike. The IN pin can be protected by schottky diode (D1) clamping the pin to GND
in the negative direction, similarly the OUT pin should be protected with a TVS protection diode (D1), or with a
local bypass capacitor, or both. D1 is selected as 1-A, 60-V Schottky Barrier Rectifier (SS16T3G) and D2 is the
60 V, TVS (SMBJ60A-13-F).
8.2.1.3 Application Curves
Figure 25. Forward voltage (VIN-VOUT) Drop Reduces
When Gate is Enabled (VIN = 12 V)
Figure 26. Forward Voltage (VIN-VOUT) Drop Increases
When Gate is Disabled (VIN = 12 V)
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