THS6226A_16 Datasheet, PDF (16/32 Pages) Texas Instruments – THS6226A Gated-Class H, Dual-Port VDSL2 Line Driver

THS6226A
SBOS643A – APRIL 2014 – REVISED MAY 2014
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7.5 Programming
7.5.1 Programming the Device
Programming the device is accomplished through a serial interface (pins 4 and 5) and proceeds in the following
sequence:
• Two start bits are required (B0 = 0 followed by B1 = 1).
• B2 through B9 are used to program the device. (Table 1 lists the bit descriptions.)
• B10 (described in Table 2) is the parity bit that controls whether the word is loaded or not.
• B11 is the stop bit and must be set to B11 = 1.
Figure 32 shows the required sequence.
Table 1. DATA Sequence
PARAMETER
B0, B1
B2, B3
B4, B5
B6-B9
B10
B11
DESCRIPTION
Start bits
Channel select
Power-down features
Quiescent current setting
Parity bit
Stop bit
Table 2. Parity Bit
B10
ODD PARITY BIT
0
For an odd number of high bits in B2 to B9, set B10 to 0
1
For an even number of high bits in B2 to B9, set B10 to 1
DATA
MSB
B0
B1 B2
B3
B4
B5
B6
B7 B8
Start Start Ch AB Ch CD PD1 PD0 D3 D2 D1
Bit
Bit Select Select
Figure 32. DATA Description
LSB
B9 B10 B11
D0 Parity Stop
Bit
16
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