THS6226A_16 Datasheet, PDF (15/32 Pages) Texas Instruments – THS6226A Gated-Class H, Dual-Port VDSL2 Line Driver

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THS6226A
SBOS643A – APRIL 2014 – REVISED MAY 2014
7.3 Feature Description
The device incorporates several hardware and functionality features: a high output current line driver, a charge
pump, a voltage reference, a logic circuit, an active impedance, and a RESET pin. The device has two ports.
Each port consists of a high output current line driver, a charge pump, and a reference voltage. Common circuits
are the RESET feature and the logic circuit.
7.3.1 High Output Current Line Driver
The main purpose for the device is to provide a high output current into a heavy load. For the THS6226A, with its
xDSL application targeted, the load is typically 100 Ω and currents as high as 400 mA are supported with
excellent linearity. The core of the line driver is a class AB amplifier providing both good efficiency and high
current drive capability. The high output line driver is the core of the device and any external circuit interface is
located on both the device inputs and output.
7.3.2 Charge Pump
The class H functionality of the device is brought on by the integration of a charge pump. The charge pump is a
power-supply function to the line driver. The role of the charge pump is to vary the power supply from (12 V /
GND) to (20 V / –8 V) and allow the line driver to support high peak to average ratio (PAR) signals while
minimizing power consumption and maintaining excellent linearity. The charge pump is controlled externally by
the V_{H_EN} pin. A logic high on the V_{H_EN} pin results in the power supply of the class AB line driver going to (20 V /
–8 V), while a logic low on the V_{H_EN} pin results in normal operation under the (12 V / GND) supplies.
7.3.3 Voltage Reference
An internal voltage reference provides the device common-mode input and output voltage.
7.3.4 Logic
The DATA and CLK pins allow access to the internal logic circuit implemented in the device. This logic circuit
allows each channel to either be programmed individually for quiescent current, turn the charge pump on or off,
disable the main amplifier, or select the line termination mode. For more information on programming, refer to the
Programming section.
7.3.5 Active Impedance
The line driver incorporates the positive feedback path to provide the termination to the load. For the device, the
synthesis factor implemented is 5.
7.3.6 RESET Pin
The RESET pin provides a quick and easy way to disable the two ports immediately if a fault condition on the
line occurs.
7.4 Device Functional Modes
There are several functional modes for the device. These functional modes can be accessed with the CLK and
DATA pins. Each main line driver quiescent current can be set to 16 different bias modes: bias 0 through bias
15. Additionally, the line driver and class H feature can be controlled to have the following configuration:
• Class AB mode is the main line driver by itself. The output voltage is limited by the (12 V / GND) power-
supply rails. The quiescent current is then set by four bits.
• Class H mode is the main line driver used in conjunction with the class H feature. The output voltage is
limited by the (20 V / –8 V) internally-generated power-supply rails. The quiescent current of the main line
driver is set by four bits, as in class AB mode.
• Line termination mode is the powered-down mode for the line driver. This mode maintains line termination but
has reduced linearity performance.
• Disabled mode.
For more information on these mode, refer to the Programming section.
Copyright © 2014, Texas Instruments Incorporated
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