OPA2652 Datasheet, PDF (16/23 Pages) Burr-Brown (TI) – Dual, 700MHz, Voltage-Feedback OPERATIONAL AMPLIFIER

OPA2652
SBOS125A – JUNE 2000 – REVISED MAY 2006
0.1mF
328W
+5V
Supply Decoupling
Not Shown
1/2
OPA2652
V_O
+5V
5kW
10kW
5kW
R_G
500W
V_I
20kW
0.1mF
-5V
-5V
R_F
1kW
±200mV Output Adjustment
V_{O = -} R_{F = -2}
V_I
R_G
Figure 36. DC-Coupled, Inverting Gain of –2, with
Offset Adjustment
Thermal Analysis
Heatsinking or forced airflow may be required under
extreme operating conditions. Maximum desired
junction temperature will set the maximum allowed
internal power dissipation as described below. In no
case should the maximum junction temperature be
allowed to exceed 175°C.
Operating junction temperature (T_J) is given by T_A +
P_D • θ_JA. The total internal power dissipation (P_D) is
the sum of quiescent power (P_DQ) and additional
power dissipated in the output stage (P_DL) to deliver
load power. Quiescent power is simply the specified
no-load supply current times the total supply voltage
across the part. P_DL depends on the required output
signal and load; for a grounded resistive load, P_DL is
at a maximum when the output is fixed at a voltage
equal to 1/2 of either supply voltage (for equal
bipolar supplies). Under this condition, P_DL =
V_S2/(4 • R_L) where R_L includes feedback network
loading.
Note that it is the power in the output stage, and not
into the load, that determines internal power
dissipation.
As an example, compute the maximum T_J using an
OPA2652E (SOT23-8 package) in the circuit of
Figure 28 operating at the maximum specified
ambient temperature of +85°C and with both outputs
driving 2.5V_DC into a grounded 100Ω load.
P_D = 10V • 15.5mA + 2 [5²/(4 • [100Ω 804Ω])] =
296mW
Maximum T_J = +85°C + (0.30W • 150°C/W) = 130°C
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This absolute worst-case condition meets the
specified maximum junction temperature. Actual P_DL
will almost always be less than that considered here.
Carefully consider maximum T_J in your application.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a
high-frequency amplifier such as the OPA2652
requires careful attention to board layout parasitics
and external component types. Recommendations
that will optimize performance include:
a) Minimize parasitic capacitance to any AC
ground for all of the signal I/O pins. Parasitic
capacitance on the output and inverting input pins
can cause instability: on the noninverting input, it can
react with the source impedance to cause
unintentional bandlimiting. To reduce unwanted
capacitance, a window around the signal I/O pins
should be opened in all of the ground and power
planes around those pins. Otherwise, ground and
power planes should be unbroken elsewhere on the
board.
b) Minimize the distance (< 0.25") from the
power-supply pins to high-frequency 0.1µF
decoupling capacitors. At the device pins, the ground
and power plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections should always be
decoupled with these capacitors. An optional supply
decoupling capacitor (0.1µF) across the two power
supplies (for bipolar operation) will improve 2nd
harmonic distortion performance. Larger (2.2µF to
6.8µF) decoupling capacitors, effective at lower
frequency, should also be used on the main supply
pins. These capacitors may be placed somewhat
farther from the device and may be shared among
several devices in the same area of the PCB.
c) Careful selection and placement of external
components will preserve the high frequency
performance of the OPA2652. Resistors should be
a very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal
film or carbon composition axiallyleaded resistors
can also provide good high frequency performance.
Again, keep resistor leads and PCB traces as short
as possible. Never use wirewound type resistors in a
high-frequency application. Since the output pin and
inverting input pin are the most sensitive to parasitic
capacitance, always position the feedback and series
output resistor, if any, as close as possible to the
output pin. Other network components, such as
noninverting input termination resistors, should also
be placed close to the package. Where double-side
component mounting is allowed, place the feedback
resistor directly under the package on the other side
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