LP3905 Datasheet, PDF (16/24 Pages) National Semiconductor (TI) – Power Management Unit For Low Power Handheld Applications

LP3905
SNVS374D – JUNE 2006 – REVISED MAY 2013
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100%
0603, 10V, X5R
80%
60%
40%
0402, 6.3V, X5R
20%
0
1.0 2.0 3.0 4.0 5.0
DC BIAS (V)
Figure 11. Capacitor Performance (DC Bias)
The ceramic capacitor’s capacitance can vary with temperature. The capacitor type X7R, which operates over a
temperature range of -55°C to +125°C, will only vary the capacitance to within ±15%. The capacitor type X5R
has a similar tolerance over a reduced temperature range of -55°C to +85°C.
Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more
expensive when comparing equivalent capacitance and voltage ratings in the 1µF to 4.7µF range.
Another important consideration is that tantalum capacitors have higher ESR values than equivalent size
ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the
stable range, it would have to be larger in capacitance (which means bigger and more costly ) than a ceramic
capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about
2:1 as the temperature goes from 25°C down to -40°C, so some guard band must be allowed.
LDO Input Capacitor
An input capacitor is required for stability. The input capacitor should be at least equal to or greater than the
output capacitor. It is recommended that a 1µF capacitor be connected between V_IN2 input pin and ground (this
capacitance value may be increased without limit).
This capacitor must be located a distance of not more than 1cm from the input pin and returned to a clean
analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.
Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low-
impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input,
it must be ensured by the manufacturer to have a surge current rating sufficient for the application. There are no
requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and temperature
coefficient must be considered when selecting the capacitor to ensure the capacitance will remain 1.0μF ±30%
over the entire operating voltage and temperature range.
LDO Output Capacitor
The LP3905 LDOs are designed specifically to work with very small ceramic output capacitors. A ceramic
capacitor (dielectric types X5R or X7R) in the 0.47μF to 10μF range, and with ESR between 5mΩ to 500mΩ, is
suitable in the application circuit. For this device the output capacitor should be connected between the LDO1
and LDO2 pins and a good ground connection and should be mounted within 1cm of the device.
The output capacitor must meet the requirement for the minimum value of capacitance and also have an ESR
value that is within the range 5mΩ to 500mΩ for stability.
No-Load Stability
The LP3905 LDOs will remain stable and in regulation with no external load.
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