DRV8302 Datasheet, PDF (16/21 Pages) Texas Instruments – Three Phase Pre-Driver with Dual Current Shunt Amplifiers and Buck Regulator – Hardware Controlled

DRV8302
SLES267 – AUGUST 2011
PIN CONTROL FUNCTIONS
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EN_GATE
EN_GATE low is used to put gate driver, charge pump, current shunt amplifier, and internal regulator blocks into
a low power consumption mode to save energy. Device will put the MOSFET output stage to high impedance
mode as long as PVDD is still present.
When EN_GATE pin goes to high, it will go through a power up sequence, and enable gate driver, current
amplifiers, charge pump, internal regulator, etc and reset all latched faults related to gate driver block. All latched
faults can be reset when EN_GATE is toggled after an error event unless the fault is still present.
When EN_GATE goes from high to low, it will shut down gate driver block immediately, so gate output can put
external FETs in high impedance mode. It will then wait for 10us before completely shutting down the rest of the
blocks. A quick fault reset mode can be done by toggling EN_GATE pin for a very short period (less than 10µS).
This will prevent device to shut down other function blocks such as charge pump and internal regulators and
bring a quicker and simple fault recovery.
One exception is to reset a GVDD_OV fault. A quick EN_GATE quick fault reset won’t work with GVDD_OV fault.
A complete EN_GATE with low level holding longer than 10 µs is required to reset GVDD_OV fault. It is highly
recommended to inspect the system and board when GVDD_OV occurs.
EN_BUCK
Buck enable pin, internal pull-up current source. Pull below 1.2 V to disable. Float to enable.
DTC
Dead time can be programmed through DTC pin. A resistor should be connected from DTC to ground to control
the dead time. Dead time control range is from 50ns to 500ns. Short DTC pin to ground will provide minimum
dead time (50ns). Resistor range is 0 to 150kΩ. Dead time is linearly set over this resistor range.
Current shoot through prevention protection will be enabled in the device all time independent of dead time
setting and input mode setting.
DC_CAL
When DC_CAL is enabled, device will short inputs of shunt amplifier and disconnect from the load, so external
microcontroller can do a DC offset calibration.
STARTUP AND SHUTDOWN SEQUENCE CONTROL
During power-up all gate drive outputs are held low. Normal operation of gate driver and current shunt amplifiers
can be initiated by toggling EN_GATE from a low state to a high state. If no errors are present after a 10-ms wait
time, the DRV8302 is ready to accept PWM inputs. Gate driver always has control of the power FETs even in
gate disable mode as long as PVDD is within functional region.
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