BQ25895_16 Datasheet, PDF (16/67 Pages) Texas Instruments – Adjustable Voltage 3.1-A Boost Operation

bq25895
SLUSC88A – MARCH 2015 – REVISED MAY 2016
www.ti.com
8.2 Feature Description
8.2.1 Device Power-On-Reset (POR)
The internal bias circuits are powered from the higher voltage of VBUS and BAT. When VBUS rises above
V_{VBUS_UVLOZ} or BAT rises above V_{BAT_UVLOZ} , the sleep comparator, battery depletion comparator and BATFET
driver are active. I²C interface is ready for communication and all the registers are reset to default value. The
host can access all the registers after POR.
8.2.2 Device Power Up from Battery without Input Source
If only battery is present and the voltage is above depletion threshold (V_{BAT_DPLZ}), the BATFET turns on and
connects battery to system. The REGN LDO stays off to minimize the quiescent current. The low R_DS(ON) of
BATFET and the low quiescent current on BAT minimize the conduction loss and maximize the battery run time.
The device always monitors the discharge current through BATFET (Supplement Mode). When the system is
overloaded or shorted (IBAT > I_{BATFET_OCP}), the device turns off BATFET immediately and set BATFET_DIS bit to
indicate BATFET is disabled until the input source plugs in again or one of the methods describe in BATFET
Enable (Exit Shipping Mode) is applied to re-enable BATFET.
8.2.3 Device Power Up from Input Source
When an input source is plugged in, the device checks the input source voltage to turn on REGN LDO and all the
bias circuits. It detects and sets the input current limit before the buck converter is started when
AUTO_DPDM_EN bit is set. The power up sequence from input source is as listed:
1. Power Up REGN LDO
2. Poor Source Qualification
3. Input Source Type Detection based on D+/D- to set default Input Current Limit (IINLIM) register and input
source type
4. Input Voltage Limit Threshold Setting (VINDPM threshold)
5. Converter Power-up
8.2.3.1 Power Up REGN Regulation (LDO)
The REGN LDO supplies internal bias circuits as well as the HSFET and LSFET gate drive. The LDO also
provides bias rail to TS external resistors. The pull-up rail of STAT can be connected to REGN as well. The
REGN is enabled when all the below conditions are valid.
1. VBUS above V_{VBUS_UVLOZ}
2. VBUS above V_BAT + V_SLEEPZ in buck mode or VBUS below V_BAT + V_SLEEP in boost mode
3. After 220 ms delay is completed
If one of the above conditions is not valid, the device is in high impedance mode (HIZ) with REGN LDO off. The
device draws less than I_{VBUS_HIZ} from VBUS during HIZ state. The battery powers up the system when the device
is in HIZ.
8.2.3.2 Poor Source Qualification
After REGN LDO powers up, the device checks the current capability of the input source. The input source has
to meet the following requirements in order to start the buck converter.
1. VBUS voltage below V_ACOV
2. VBUS voltage above V_VBUSMIN when pulling I_BADSRC (typical 30mA)
Once the input source passes all the conditions above, the status register bit VBUS_GD is set high and the INT
pin is pulsed to signal to the host. If the device fails the poor source detection, it repeats poor source qualification
every 2 seconds.
16
Submit Documentation Feedback
Product Folder Links: bq25895
Copyright © 2015–2016, Texas Instruments Incorporated