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AMC1204_1108 Datasheet, PDF (16/30 Pages) Texas Instruments – 20MHz, Second-Order, Isolated Delta-Sigma Modulator for Current-Shunt Measurement
AMC1204
SBAS512B – APRIL 2011 – REVISED AUGUST 2011
www.ti.com
THEORY OF OPERATION
The differential analog input of the AMC1204 is implemented with a switched-capacitor circuit. This
switched-capacitor circuit implements a second-order modulator stage that digitizes the input signal into a 1-bit
output stream. The externally-provided clock source at the CLKIN pin is used by the capacitor circuit and the
modulator and should be in the range of 5MHz to 22MHz. The analog input signal is continuously sampled by the
modulator and compared to an internal voltage reference. A digital stream, accurately representing the analog
input voltage over time, appears at the output of the converter at the DATA pin.
ANALOG INPUT
The AMC1204 measures the differential input signal VIN = (VINP – VINN) against the internal reference of 2.5V
using internal capacitors that are continuously charged and discharged. Figure 42 shows the simplified schematic
of the ADC input circuitry; the right side of Figure 42 illustrates the input circuitry with the capacitors and switches
replaced by an equivalent circuit.
In Figure 42, the S1 switches close during the input sampling phase. With the S1 switches closed, CDIFF charges
to the voltage difference across VINP and VINN. For the discharge phase, both S1 switches open first and then
both S2 switches close. CDIFF discharges approximately to AGND + 0.8V during this phase. This two-phase
sample/discharge cycle repeats with a period of tCLKIN = 1/fCLKIN. fCLKIN is the operating frequency of the
modulator. The capacitors CIP and CIN are of parasitic nature and caused by bonding wires and the internal ESD
protection structure.
AVDD
AGND
AGND
VINP
VINN
CIP = 3pF
200W
S1
S1
200W
S2
CDIFF = 4pF
S2
CIN = 3pF
AGND + 0.8V
Equivalent
Circuit
VINP
AGND + 0.8V
VINN
3pF
REFF = 12.5kW
3pF
AGND AGND
REFF =
1
fCLKIN ´ CDIFF
(fCLKIN = 20MHz)
Figure 42. Equivalent Analog Input Circuit
AGND
The input impedance becomes a consideration in designs with high input signal source impedance. This high
impedance may cause degradation in gain, linearity, and THD. The importance of this effect, however, depends
on the desired system performance. This input stage provides the mechanism to achieve low system noise, high
common-mode rejection (105dB), and excellent power-supply rejection.
There are two restrictions on the analog input signals VINP and VINN. First, if the input voltage exceeds the
range AGND – 0.5V to AVDD + 0.3V, the input current must be limited to 10mA because the input protection
diodes on the front end of the converter begin to turn on. In addition, the linearity and the noise performance of
the device are ensured only when the differential analog input voltage remains within ±250mV.
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Copyright © 2011, Texas Instruments Incorporated