LM3S808 Datasheet, PDF (151/543 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S808 Microcontroller
5.2.2.2
2. Power-on reset (POR); see “Power-On Reset (POR)” on page 151.
3. Internal brown-out (BOR) detector; see “Brown-Out Reset (BOR)” on page 153.
4. Software-initiated reset (with the software reset registers); see “Software Reset” on page 154.
5. A watchdog timer reset condition violation; see “Watchdog Timer Reset” on page 154.
6. Internal low drop-out (LDO) regulator output.
Table 5-2 provides a summary of results of the various reset operations.
Table 5-2. Reset Sources
Reset Source
Core Reset?
JTAG Reset?
On-Chip Peripherals Reset?
Power-On Reset
Yes
Yes
Yes
RST
Yes
Pin Config Only
Yes
Brown-Out Reset
Yes
No
Yes
Software System Request
Yes
No
Yes
Reset^a
Software Peripheral Reset
No
No
Yes^b
Watchdog Reset
Yes
No
Yes
LDO Reset
Yes
No
Yes
a. By using the SYSRESREQ bit in the ARM Cortex-M3 Application Interrupt and Reset Control (APINT) register
b. Programmable on a module-by-module basis using the Software Reset Control Registers.
After a reset, the Reset Cause (RESC) register is set with the reset cause. The bits in this register
are sticky and maintain their state across multiple reset sequences, except when an external reset
is the cause, and then all the other bits in the RESC register are cleared.
Note: The main oscillator is used for external resets and power-on resets; the internal oscillator
is used during the internal process by internal reset and clock verification circuitry.
Power-On Reset (POR)
Note: The power-on reset also resets the JTAG controller. An external reset does not.
The internal Power-On Reset (POR) circuit monitors the power supply voltage (V_DD) and generates
a reset signal to all of the internal logic including JTAG when the power supply ramp reaches a
threshold value (V_TH). The microcontroller must be operating within the specified operating parameters
when the on-chip power-on reset pulse is complete. The 3.3-V power supply to the microcontroller
must reach 3.0 V within 10 msec of V_DD crossing 2.0 V to guarantee proper operation. For applications
that require the use of an external reset signal to hold the microcontroller in reset longer than the
internal POR, the RST input may be used as discussed in “External RST Pin” on page 152.
The Power-On Reset sequence is as follows:
1. The microcontroller waits for internal POR to go inactive.
2. The internal reset is released and the core loads from memory the initial stack pointer, the initial
program counter, and the first instruction designated by the program counter, and then begins
execution.
The internal POR is only active on the initial power-up of the microcontroller. The Power-On Reset
timing is shown in Figure 18-6 on page 503.
July 14, 2014
151
Texas Instruments-Production Data