LM3S808 Datasheet, PDF (10/543 Pages) List of Unclassifed Manufacturers – Microcontroller

Table of Contents
Figure 13-1. I²C Block Diagram ............................................................................................. 440
Figure 13-2. I²C Bus Configuration ........................................................................................ 441
Figure 13-3. START and STOP Conditions ............................................................................. 441
Figure 13-4. Complete Data Transfer with a 7-Bit Address ....................................................... 442
Figure 13-5. R/S Bit in First Byte ............................................................................................ 442
Figure 13-6. Data Validity During Bit Transfer on the I²C Bus ................................................... 442
Figure 13-7. Master Single SEND .......................................................................................... 446
Figure 13-8. Master Single RECEIVE ..................................................................................... 447
Figure 13-9. Master Burst SEND ........................................................................................... 448
Figure 13-10. Master Burst RECEIVE ...................................................................................... 449
Figure 13-11. Master Burst RECEIVE after Burst SEND ............................................................ 450
Figure 13-12. Master Burst SEND after Burst RECEIVE ............................................................ 451
Figure 13-13. Slave Command Sequence ................................................................................ 452
Figure 14-1. Analog Comparator Module Block Diagram ......................................................... 476
Figure 14-2. Structure of Comparator Unit .............................................................................. 477
Figure 14-3. Comparator Internal Reference Structure ............................................................ 478
Figure 15-1. 48-Pin QFP Package Pin Diagram ...................................................................... 488
Figure 18-1. Load Conditions ................................................................................................ 500
Figure 18-2. JTAG Test Clock Input Timing ............................................................................. 501
Figure 18-3. JTAG Test Access Port (TAP) Timing .................................................................. 502
Figure 18-4. JTAG TRST Timing ............................................................................................ 502
Figure 18-5. External Reset Timing (RST) .............................................................................. 503
Figure 18-6. Power-On Reset Timing ..................................................................................... 503
Figure 18-7. Brown-Out Reset Timing .................................................................................... 503
Figure 18-8. Software Reset Timing ....................................................................................... 504
Figure 18-9. Watchdog Reset Timing ..................................................................................... 504
Figure 18-10. LDO Reset Timing ............................................................................................. 504
Figure 18-11. ADC Input Equivalency Diagram ......................................................................... 506
Figure 18-12. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing
Measurement .................................................................................................... 507
Figure 18-13. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ................. 507
Figure 18-14. SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ..................................... 508
Figure 18-15. I²C Timing ......................................................................................................... 509
Figure D-1. Stellaris LM3S808 48-Pin LQFP Package ........................................................... 534
Figure D-2. 48-Pin LQFP Tray Dimensions ........................................................................... 536
Figure D-3. 48-Pin LQFP Tape and Reel Dimensions ............................................................. 538
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July 14, 2014
Texas Instruments-Production Data