THS5641AIDWG4 Datasheet, PDF (15/31 Pages) Texas Instruments – 8-BIT, 100 MSPS, CommsDAC DIGITAL-TO-ANALOG CONVERTER

THS5641A
8ĆBIT, 100 MSPS, CommsDAC
DIGITALĆTOĆANALOG CONVERTER
SLAS277A −MARCH 2000 − REVISED SEPTEMBER 2002
APPLICATION INFORMATION
DAC transfer function
The THS5641A delivers complementary output currents IOUT1 and IOUT2. Output current IOUT1 equals the
approximate full-scale output current when all input bits are set high in mode 0 (straight binary input), i.e. the
binary input word has the decimal representation 255. For mode 1, the MSB is inverted (twos complement input
format). Full-scale output current will flow through terminal IOUT2 when all input bits are set low (mode 0,
straight binary input). The relation between IOUT1 and IOUT2 can thus be expressed as:
IOUT1 + IOUT_FS * IOUT2
where IOUT_FS is the full-scale output current. The output currents can be expressed as:
IOUT1 + IOUT_FS
CODE
256
IOUT2 + IOUT_FS
(255 * CODE)
256
where CODE is the decimal representation of the DAC data input word. Output currents IOUT1 and IOUT2 drive
resistor loads R_LOAD or a transformer with equivalent input load resistance R_LOAD. This would translate into
single-ended voltages VOUT1 and VOUT2 at terminal IOUT1 and IOUT2, respectively, of:
VOUT1 + IOUT1
R_LOAD
+
CODE
256
IOUT_FS
R_LOAD
VOUT2 + IOUT2
R_LOAD
+
(255–CODE)
256
IOUT_FS
R_LOAD
The differential output voltage VOUT_DIFF can thus be expressed as:
VOUT_DIFF
+
VOUT1–VOUT2
+
(2CODE–255)
256
IOUT_FS
R_LOAD
The latter equation shows that applying the differential output will result in doubling of the signal power delivered
to the load. Since the output currents of IOUT1 and IOUT2 are complementary, they become additive when
processed differentially. Care should be taken not to exceed the compliance voltages at node IOUT1 and
IOUT2, which would lead to increased signal distortion.
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