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OPA172IDR Datasheet, PDF (15/29 Pages) Texas Instruments – 36-V Single-Supply 10-MHz Rail-to-Rail Output Operational Amplifiers
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OPA172
OPA2172
OPA4172
SBOS618 – DECEMBER 2013
GENERAL LAYOUT GUIDELINES
For best operational performance of the device, good printed circuit board (PCB) layout practices are
recommended. Including:
• Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable to single-
supply applications.
• In order to reduce parasitic coupling, run the input traces as far away from the supply lines as possible.
• A ground plane helps distribute heat and reduces EMI noise pickup.
• Place the external components as close to the device as possible. This configuration prevents parasitic
errors (such as the Seebeck effect) from occurring.
• Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly
reduce leakage currents from nearby traces that are at different potentials.
COMMON-MODE VOLTAGE RANGE
The input common-mode voltage range of the OPAx172 series extends 100 mV below the negative rail and
within 2 V of the top rail for normal operation.
This device can operate with full rail-to-rail input 100 mV beyond the top rail, but with reduced performance within
2 V of the top rail. The typical performance in this range is summarized in Table 3.
Table 3. Typical Performance Range (VS = ±18V)
PARAMETER
MIN
TYP
MAX
Input Common-Mode Voltage
(V+) – 2
(V+) + 0.1
Offset voltage
5
vs Temperature (TA = –40°C to +125°C)
10
Common-mode rejection
70
Open-loop gain
60
GBW
4
Slew rate
4
Noise at f = 1 kHz
22
UNIT
V
mV
µV/°C
dB
dB
MHz
V/µs
nV/√Hz
PHASE-REVERSAL PROTECTION
The OPAx172 family has an internal phase-reversal protection. Many op amps exhibit a phase reversal when the
input is driven beyond its linear common-mode range. This condition is most often encountered in noninverting
circuits when the input is driven beyond the specified common-mode voltage range, causing the output to
reverse into the opposite rail. The input of the OPAx172 prevents phase reversal with excessive common-mode
voltage. Instead, the output limits into the appropriate rail. This performance is shown in Figure 42.
+ 18 V
±
OPA172
+
+
± 37 VPP ± 18 V
Sine Wave
(±18.5V)
VOUT
VOUT
VIN
Time (200 s/div)
C011
Figure 42. No Phase Reversal
Copyright © 2013, Texas Instruments Incorporated
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Product Folder Links: OPA172 OPA2172 OPA4172