DRV8870_16 Datasheet, PDF (15/25 Pages) Texas Instruments – Brushed DC Motor Driver

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10 Layout
DRV8870
SLVSCY8A – AUGUST 2015 – REVISED JANUARY 2016
10.1 Layout Guidelines
The bulk capacitor should be placed to minimize the distance of the high-current path through the motor driver
device. The connecting metal trace widths should be as wide as possible, and numerous vias should be used
when connecting PCB layers. These practices minimize inductance and allow the bulk capacitor to deliver high
current.
Small-value capacitors should be ceramic, and placed closely to device pins.
The high-current device outputs should use wide metal traces.
The device thermal pad should be soldered to the PCB top-layer ground plane. Multiple vias should be used to
connect to a large bottom-layer ground plane. The use of large metal planes and multiple vias help dissipate the
I² x R_DS(on) heat that is generated in the device.
10.2 Layout Example
Recommended layout and component placement is shown in the following diagram.
GND
IN2
IN1
VREF
OUT2
ISEN
OUT1
VM
Figure 15. Layout Recommendation
10.3 Thermal Considerations
The DRV8870 device has thermal shutdown (TSD) as described in the Thermal Shutdown (TSD) section. If the
die temperature exceeds approximately 175°C, the device is disabled until the temperature drops below the
temperature hysteresis level.
Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient
heatsinking, or too high of an ambient temperature.
10.4 Power Dissipation
Power dissipation in the DRV8870 device is dominated by the power dissipated in the output FET resistance,
R_DS(on). Use the equation in the Drive Current section to calculate the estimated average power dissipation when
driving a load.
Note that at startup, the current is much higher than normal running current; this peak current and its duration
must be also be considered.
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