DRV3204E-Q1 Datasheet, PDF (15/39 Pages) Texas Instruments – Three-Phase Brushless Motor Driver

DRV3204E-Q1
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CSCFG (Address 0x0A): Current Sense Configuration Register
Bit Name
Type ⁽¹⁾
7:3 RSVD
R
2:0 CSOFFSET RW
(1) R: Read W: Write
Reset
0000 0
000
Description
Reserved
Current-sense offset
000: 0.5 V
001: 1 V
010: 1.5 V
011: 2 V
100: 2.5 V
Others: 0.5 V
SLVSCB5A – OCTOBER 2013 – REVISED JANUARY 2013
PDCFG (Address 0x0B): Pre-Driver Configuration Register
Bit Name
Type ⁽¹⁾
7:2 RSVD
R
1:0 DEADT RW
(1) R: Read W: Write
Reset Description
0000 00 Reserved
00
Dead time (= t_dead)
00: 2.1 µs
01: 1.6 µs
10: 1.1 µs
11: 0.6 µs
The actual dead time has ±0.1 µs variation from the typical value.
DIAG (Address 0x0C): Diagnosis Register
Bit Name
7:3 RSVD
2 VCCUVRST
1 WDTRST
0 CMRST
Type
R
R
R
R
Reset
0000 0
0
0
0
Description
Reserved
nRES reset source information
Bit 2 = VCCUVRST - VCC undervoltage
Bit 1 = WDTRST - watchdog timer
Bit 0 = CMRST - clock monitor
0: Read = Reset has not occurred.
Write = No effect
1: Read = A corresponding reset source caused the last reset condition.
Write = No effect
Read access to this register clears the bits.
SPARE (Address 0x0D): Spare Register
Bit Name
Type⁽¹⁾ Reset Description
7:2 SPARE
RW
0000 00 Spare registers for future use. Read and write have no effect.
1:0 SEL_COMP_HYS RW
00
Select phase comparator hysteresis voltage. The following show the typical values.
MM 00: 0 V
MM 01: 25 mV
MM 10: 50 mV
MM 11: 100 mV
(1) R: Read W: Write
Copyright © 2013, Texas Instruments Incorporated
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