SM72445 Datasheet, PDF (14/19 Pages) Texas Instruments – Programmable Maximum Power Point Tracking Controller With Adjustable PWM Frequency

The data registers in the SM72445 are selected by the Com-
mand Register. The Command Register is offset from base
address 0xE0. Each data register in the SM72445 falls into
one of two types of user accessibility:
1) Read only (Reg0, Reg1)
2) Write/Read same address (Reg3, Reg4, Reg5)
There are 7 bytes in each register (56 bits), and data must be
read and written in blocks of 7 bytes. Figure 10 depicts the
ordering of the bytes transmitted in each frame and the bits
within each byte. In the read sequence depicted in Figure
11 the data bytes are transmitted in Frames 5 through 11,
starting from the LSByte, DATA1, and ending with MSByte,
DATA7. In the write sequence depicted in Figure 12, the data
bytes are transmitted in Frames 4 through 11. Only the
100kHz data rate is supported. Please refer to “The I2C Bus
Specification” version 2.1 (Doc#: 939839340011) for more
documentation on the I2C bus.
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FIGURE 10. Endianness Diagram
FIGURE 11. I2C Read Sequence
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