SM72445 Datasheet, PDF (12/19 Pages) Texas Instruments – Programmable Maximum Power Point Tracking Controller With Adjustable PWM Frequency

reg0 Register Description
Bits
Field
55:40
RSVD
39:30
ADC6
29:20
ADC4
19:10
ADC2
9:0
ADC0
Reset Value
16'h0
10'h0
10'h0
10'h0
10'h0
reg1 Register Description
Bits
Field
55:41
RSVD
40
mppt_ok
39:30
Vout
29:20
Iout
19:10
Vin
9:0
Iin
Reset Value
15'h0
1'h0
10'h0
10'h0
10'h0
10'h0
reg3 Register Description
Bits
Field
55:47
RSVD
46
overide_adcprog
Reset Value
9'd0
1'b0
45
RSVD
1'b0
44:43
RSVD
2'd1
42:40
A2_override
3'd0
39:30
29:20
19:17
16:14
13:5
4
3
2
1
0
iout_max
vout_max
tdoff
tdon
dc_open
pass_through_s
el
pass_through_m
anual
bb_reset
clk_oe_manual
Open Loop
operation
10'd1023
10'd1023
3'h3
3'h3
9'hFF
1'b0
1'b0
1'b0
1'b0
1'b0
R/W
R
R
R
R
R
R/W
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit Field Description
Reserved for future use.
Analog Channel 6 (slew rate detection time constant,
see adc config worksheet)
Analog Channel 4 (iout_max: maximum allowed output
current)
Analog Channel 2 (operating mode, see adc_config
worksheet)
Analog Channel 0 (vout_max: maximum allowed
output voltage)
Bit Field Description
Reserved for future use.
Internal mppt_start signal (test only)
Voltage out
Current out
Voltage in
Current in
Bit Field Description
Reserved
When set to 1'b1,the below overide registers used
instead of ADC
Reserved
Reserved
Register override alternative for the three MSBs of
ADC2 (bits [9–7]) when reg3[46] is set. This allows
frequency and panel mode configuration to be set
through I2C
Register override alternative when reg3[46] is set for
maximum current threshold instead of ADC ch4
Register override alternative when reg3[46] is set for
maximum voltage threshold instead of ADC ch0
Dead time Off Time
Dead time On time
Open loop duty cycle (test only)
Overrides PM pin 28 and use reg3[3]
Control Panel Mode when pass_through_sel bit is 1'b1
Soft reset
Enable the PLL clock to appear on pin 5
Open Loop operation (MPPT disabled, receives duty
cycle command from reg 3b13:5); set to 1 and then
assert & deassert bb_reset to put the device in
openloop (test only)
www.ti.com
12