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OPA365-EP Datasheet, PDF (14/19 Pages) Texas Instruments – 50-MHz Low-Distortion High-CMRR Rail-to-Rail I/O, Single-Supply Operational Amplifier
OPA365-EP
SLOS735 – AUGUST 2011
www.ti.com
+5V
V+
OPA365
C1
100nF
R1(1)
100Ω
V−
VIN
0 to 4.096V
C3(1)
1nF
R2
500Ω
−5V
Optional(2)
SD1
BAS40
C2
100nF
+5V
REF3240
4.096V
+5V
+IN
ADS8326
16Bit
−IN 250kSPS
REF NI
C4
100nF
Figure 11. Driving the ADS8326
One method for driving an ADC that negates the need for an output swing down to 0 V uses a slightly
compressed ADC full-scale input range (FSR). For example, the 16-bit ADS8361 (shown in Figure 12) has a
maximum FSR of 0 V to 5 V, when powered by a 5-V supply and VREF of 2.5 V. The idea is to match the ADC
input range with the op amp full linear output swing range; for example, an output range of 0.1 V to 4.9 V. The
reference output from the ADS8361 ADC is divided down from 2.5 V to 2.4 V using a resistive divider. The ADC
FSR then becomes 4.8VPP centered on a common-mode voltage of 2.5 V. Current from the ADS8361 reference
pin is limited to about ±10 µA. Here, 5 µA was used to bias the divider. The resistors must be precise to maintain
the ADC gain accuracy. An additional benefit of this method is the elimination of the negative supply voltage; it
requires no additional power-supply current.
R2
10kΩ
+5V
R1
10kΩ
VIN
0.1V to 4.9V
C1
100nF
V+
OPA365
R3(A)
100Ω
V−
+5V
−IN
C2(A)
1nF +IN
ADS8361
16Bit
100kSPS
REF OUT REF IN
+2.5V
R4
20kΩ
+2.4V
R5
C3
480kΩ
1µF
Figure 12. Driving the ADS8361
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