LP38513 Datasheet, PDF (14/25 Pages) National Semiconductor (TI) – 3A Fast Response Ultra Low Dropout Linear Regulator

LP38513
SNVS361E – JULY 2007 – REVISED NOVEMBER 2015
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X7R and X5R dielectric ceramic capacitors are strongly recommended, as they typically maintain a capacitance
range within ±20% of nominal over full operating ratings of temperature and voltage; they are typically larger and
more costly than Z5U/Y5U types for a given voltage and capacitance.
Z5U and Y5V dielectric ceramics are not recommended as the capacitance will drop severely with applied
voltage. A typical Z5U or Y5V capacitor can lose 60% of its rated capacitance with half of the rated voltage
applied to it. The Z5U and Y5V also exhibit a severe temperature effect, losing more than 50% of nominal
capacitance at high and low limits of the temperature range.
8.2.2.2 Reverse Voltage
A reverse voltage condition will exist when the voltage at the OUT pin is higher than the voltage at the IN pin.
Typically this happens when V_IN is abruptly taken low and C_OUT continues to hold a sufficient charge such that
the input to output voltage becomes reversed. A less common condition is when an alternate voltage source is
connected to the output.
There are two possible paths for current to flow from the OUT pin back to the input during a reverse voltage
condition.
While V_IN is high enough to keep the control circuity alive, and the EN pin is above the V_EN(ON) threshold, the
control circuitry attempts to regulate the output voltage. Because the input voltage is less than the output voltage
the control circuit drives the gate of the pass element to the full ON condition when the output voltage begins to
fall. In this condition, reverse current will flow from the OUT pin to the IN pin, limited only by the R_DS(ON) of the
pass element and the output-to-input voltage differential. Discharging an output capacitor up to 1000 µF in this
manner does not damage the device as the current rapidly decays. However, continuous reverse current must be
avoided.
The internal PFET pass element in the LP38513 has an inherent parasitic diode. During normal operation, the
input voltage is higher than the output voltage, and the parasitic diode is reverse biased. However, if the output-
voltage-to-input-voltage differential is more than 500 mV (typical), the parasitic diode becomes forward biased,
and current flows from the OUT pin to the input through the diode. The current in the parasitic diode must be
limited to less than 1-A continuous and 5-A peak.
If used in a dual-supply system where the regulator output load is returned to a negative supply, the OUT pin
must be diode clamped to ground. A Schottky diode is recommended for this protective clamp.
8.2.2.3 Power Dissipation
A heat sink may be required depending on the maximum power dissipation (P_D(MAX)), maximum ambient
temperature (T_A(MAX))of the application, and the thermal resistance (R_θJA) of the package. Under all possible
conditions, the junction temperature (T_J) must be within the range specified in the Recommended Operating
Conditions. The total power dissipation of the device is given by:
P_D = ((V_IN − V_OUT) × I_OUT) + ((V_IN) × I_GND)
where
• I_GND is the operating ground current of the device (specified under Electrical Characteristics).
(1)
The maximum allowable junction temperature rise (ΔT_J) depends on the maximum expected ambient
temperature (T_A(MAX)) of the application, and the maximum allowable junction temperature (T_J(MAX)):
ΔT_J = T_J(MAX)− T_A(MAX)
(2)
The maximum allowable value for junction-to-ambient thermal resistance, R_θJA, can be calculated using the
formula:
R_θJA = ΔT_J / P_D(MAX)
(3)
Knowing the device power dissipation and proper sizing of the thermal plane connected to the tab or pad is
critical to ensuring reliable operation. Device power dissipation depends on input voltage, output voltage, and
load conditions and can be calculated with Equation 4.
P_D(MAX) = (V_IN(MAX) – V_OUT) × I_OUT(MAX)
(4)
Power dissipation can be minimized, and greater efficiency can be achieved, by using the lowest available
voltage drop option that would still be greater than the dropout voltage (V_DO). However, keep in mind that higher
voltage drops result in better dynamic (that is, PSRR and transient) performance.
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