LP38513 Datasheet, PDF (11/25 Pages) National Semiconductor (TI) – 3A Fast Response Ultra Low Dropout Linear Regulator

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LP38513
SNVS361E – JULY 2007 – REVISED NOVEMBER 2015
7.4 Device Functional Modes
7.4.1 Enable Operation
The Enable on/off threshold is typically 850 mV and has no hysteresis. The voltage signal must rise and fall
cleanly, and promptly, through this threshold. The EN pin has no internal pullup or pulldown to establish a default
condition and, as a result, this pin must be terminated either actively or passively.
If the EN pin is driven from a single ended device (such as the collector of a discrete transistor) a pullup resistor
to V_IN, or a pulldown resistor to ground, is required for proper operation. A 1-kΩ to 100-kΩ resistor can be used
as the pullup or pulldown resistor to establish default condition for the EN pin. The resistor value selected must
be appropriate to swamp out any leakage in the external single-ended device, as well as any stray capacitance.
If the EN pin is driven from a source that actively pulls high and low (such as a CMOS rail-to-rail comparator
output), the pullup or pulldown resistor is not required.
If the application does not require the enable function, the EN pin must be connected directly to the adjacent IN
pin.
7.4.2 ERROR Flag Operation
The internal ERROR flag comparator has an open-drain output stage. Hence, the ERROR pin requires an
external pullup resistor. The value of the pullup resistor must be in the range of 2 kΩ to 20 kΩ and must be
connected to the LP38513 OUT pin. The ERROR flag pin must not be pulled up to any voltage source higher
than V_IN as current flow through an internal parasitic diode may cause unexpected behavior. When the input
voltage is less than typically 1.25 V the status of the ERROR flag output is not reliable. The ERROR flag pin
must be connected to ground if this function is not used.
The timing diagram in Figure 16 shows the relationship between the ERROR flag and the output voltage when a
pullup resistor is connected to the output voltage pin.
The timing diagram in Figure 17 shows the relationship between the ERROR flag and the output voltage when
the pullup resistor is connected to the input voltage.
~2.50V
~2.25V
V_IN
~1.25V
V_OUT
NOM
~89%
~85%
Power-
Up
Load
Transient
Line
Transient
Power-
Down
V_ERROR
Figure 16. ERROR Flag Operation (see Figure 18)
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