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BQ3285_15 Datasheet, PDF (14/26 Pages) Texas Instruments – Real-Time Clock (RTC)
bq3285
Read/Write Timing (TA = TOPR, VCC = 5V ± 10%)
Symbol
Parameter
Minimum
tCYC
Cycle time
160
tDSL
DS low or RD/WR high time
80
tDSH
DS high or RD/WR low time
55
tRWH
R/W hold time
0
tRWS
R/W setup time
10
tCS
Chip select setup time
5
tCH
Chip select hold time
0
tDHR
Read data hold time
0
tDHW
Write data hold time
0
tAS
Address setup time
20
tAH
Address hold time
5
tDAS
Delay time, DS to AS rise
10
tASW
Pulse width, AS high
30
tASD
Delay time, AS to DS rise (RD/WR
fall)
35
tOD
Output data delay time from DS rise
(RD fall)
-
tDW
Write data setup time
30
tBUC
Delay time before update cycle
-
tPI
Periodic interrupt time interval
-
tUC
Time of update cycle
-
Typical
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
244
-
1
Maximum
-
-
-
-
-
-
-
25
-
-
-
-
-
-
50
-
-
-
-
Unit
Notes
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
-
See Table 3
µs
14