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BQ27530-G1 Datasheet, PDF (14/20 Pages) Texas Instruments – Battery Management Unit Impedance Track Fuel Gauge for Use With the bq2416x Charger Controller
bq27530-G1
SLUSAL5 – DECEMBER 2012
www.ti.com
I2C Command Waiting Time
To ensure proper operation at 400 kHz, a t(BUF) ≥ 66 μs bus free waiting time should be inserted between all
packets addressed to the bq27530-G1 . In addition, if the SCL clock frequency (fSCL) is > 100 kHz, use individual
1-byte write commands for proper data flow control. The following diagram shows the standard waiting time
required between issuing the control subcommand the reading the status result. A DF_CHECKSUM
subcommand requires 100mS minimum prior to reading the result. An OCV_CMD subcommand requires 1.2
seconds prior to reading the result. For read-write standard command, a minimum of 2 seconds is required to get
the result updated. For read-only standard commands, there is no waiting time required, but the host should not
issue all standard commands more than two times per second. Otherwise, the gauge could result in a reset issue
due to the expiration of the watchdog timer.
S ADDR [6:0] 0 A CMD [7:0] A DATA [7:0] A P 66ms
S ADDR [6:0] 0 A CMD [7:0] A DATA [7:0] A P 66ms
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0]
Waiting time inserted between two 1-byte write packets for a subcommand and reading results
(required for 100 kHz < fSCL £ 400 kHz)
NP
66ms
S ADDR [6:0] 0 A CMD [7:0] A DATA [7:0] A DATA [7:0] A P 66ms
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0] N P
Waiting time inserted between incremental 2-byte write packet for a subcommand and reading results
(acceptable for fSCL £ 100 kHz)
66ms
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0] A
DATA [7:0] A DATA [7:0] N P 66ms
Waiting time inserted after incremental read
I2C Clock Stretching
A clock stretch can occur during all modes of fuel gauge operation. In SLEEP and HIBERNATE modes, a short
clock stretch will occur on all I2C traffic as the device must wake-up to process the packet. In the other modes (
BAT INSERT CHECK , NORMAL, SLEEP+ ) clock stretching will only occur for packets addressed for the fuel
gauge. The majority of clock stretch periods are small as the I2C interface performs normal data flow control.
However, less frequent yet more significant clock stretch periods may occur as blocks of Data Flash are updated.
The following table summarizes the approximate clock stretch duration for various fuel gauge operating
conditions.
Gauging Mode
SLEEP
HIBERNATE
BAT INSERT
CHECK
NORMAL
SLEEP+
Operating Condition / Comment
Clock stretch occurs at the beginning of all traffic as the device wakes up.
Clock stretch occurs within the packet for flow control. (after a start bit, ACK or first data bit)
Normal Ra table Data Flash updates.
Data Flash block writes.
Restored Data Flash block write after loss of power.
End of discharge Ra table Data Flash update.
Approximate
Duration
≤ 4 ms
≤ 4 ms
24 ms
72 ms
116 ms
144 ms
14
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