BQ2010_15 Datasheet, PDF (14/26 Pages) Texas Instruments – Gas Gauge IC

Not Recommended For New Designs
bq2010
DR2–0 and OVLD are set based on the measurement of the
voltage at the SR pin relative to V_SS. The rate at which
this measurement is made varies with device activity.
Program Pin Pull-Down Register (PPD)
The read-only PPD register (address=07h) contains
some of the programming pin information for the
bq2010. The segment drivers, SEG_1–6, have a corre-
sponding PPD register location, PPD_1–6. A given loca-
tion is set if a pull-down resistor has been detected on
its corresponding segment driver. For example, if SEG₁
and SEG₄ have pull-down resistors, the contents of
PPD are xx001001.
PPD/PPU Bits
7
6
5
4
3
2
1
0
-
- PPU₆ PPU₅ PPU4 PPU₃ PPU₂ PPU₁
-
- PPD₆ PPD₅ PPD4 PPD₃ PPD₂ PPD₁
Program Pin Pull-Up Register (PPU)
The read-only PPU register (address=08h) contains the
rest of the programming pin information for the bq2010.
The segment drivers, SEG_1–6, have a corresponding PPU
register location, PPU_1–6. A given location is set if a pull-
up resistor has been detected on its corresponding segment
driver. For example, if SEG₃ and SEG₆ have pull-up resis-
tors, the contents of PPU are xx100100.
Capacity Inaccurate Count Register (CPI)
The read-only CPI register (address=09h) is used to indi-
cate the number of times a battery has been charged with-
out an LMD update. Because the capacity of a recharge-
able battery varies with age and operating conditions, the
bq2010 adapts to the changing capacity over time. A com-
plete discharge from full (NAC=LMD) to empty (EDV1=1)
is required to perform an LMD update assuming there
have been no intervening valid charges, the temperature is
greater than or equal to 0°C, and the self-discharge coun-
ter is less than 4096 counts.
The CPI register is incremented every time a valid
charge is detected. When NAC > 0.94 _* LMD, however,
the CPI register increments on the first valid charge;
CPI does not increment again for a valid charge until
NAC < 0.94 _* LMD. This prevents continuous trickle
charging from incrementing CPI if self-discharge decre-
ments NAC. The CPI register increments to 255 with-
out rolling over. When the contents of CPI are incre-
mented to 64, the capacity inaccurate flag, CI, is as-
serted in the FLGS1 register. The CPI register is reset
whenever an update of the LMD register is performed,
and the CI flag is also cleared.
Digital Magnitude Filter (DMF)
The read-write DMF register (address = 0ah) provides
the system with a means to change the default settings
of the digital magnitude filter. By writing different val-
ues into this register, the limits of V_SRD and V_SRQ can be
adjusted.
Note: Care should be taken when writing to this regis-
ter. A V_SRD and V_SRQ below the specified V_OS may ad-
versely affect the accuracy of the bq2010. Refer to Table
4 for recommended settings for the DMF register.
Reset Register (RST)
The reset register (address=39h) provides the means to
perform a software-controlled reset of the device. By
writing the RST register contents from 00h to 80h, a
bq2010 reset is performed. Setting any bit other than the
most-significant bit of the RST register is not allowed,
and results in improper operation of the bq2010.
Resetting the bq2010 sets the following:
n _{LMD = PFC}
n _{CPI, VDQ, NACH, and NACL = 0}
n _{CI and BRP = 1}
Note: NACH = PFC when PROG₆ = H. Self-discharge is
disabled when PROG₅ = H
Display
The bq2010 can directly display capacity information
using low-power LEDs. If LEDs are used, the program
pins should be resistively tied to V_CC or V_SS for a pro-
gram high or program low, respectively.
The bq2010 displays the battery charge state in either
absolute or relative mode. In relative mode, the battery
charge is represented as a percentage of the LMD. Each
LED segment represents 20% of the LMD. The sixth
segment, SEG₆, is not used.
In absolute mode, each segment represents a fixed
amount of charge, based on the initial PFC. In absolute
mode, each segment represents 20% of the PFC, with
SEG₆ representing “overfull” (charge above the PFC).
As the battery wears out over time, it is possible for the
LMD to be below the initial PFC. In this case, all of the
LEDs may not turn on in absolute mode, representing
the reduction in the actual battery capacity.
The capacity display is also adjusted for the present bat-
tery temperature. The temperature adjustment reflects
the available capacity at a given temperature but does not
affect the NAC register. The temperature adjustments are
detailed in the TMPGG register description.
When DISP is tied to V_CC, the SEG_1–6 outputs are inactive.
When DISP is left floating, the display becomes active
14