TAS5780M Datasheet, PDF (136/204 Pages) Texas Instruments – Digital Input, Closed-Loop Class-D Amplifier with 96-kHz Processing

TAS5780M
SLASEG7 – DECEMBER 2016
www.ti.com
13.0.4.89 Register 98 (0x62)
Figure 183. Register 98 (0x62)
7
6
5
4
3
2
1
0
Reserved
PDDM
R/W
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 122. Register 98 (0x62) Field Descriptions
Bit Field
7-6 Reserved
5-0 PDDM
Type
R/W
R
Reset
0
Description
Reserved
PLL D Monitor (MSB) – These bits indicate the actually used value for PLL
multiplication factor D of the overall J.D × R. The actual value is the auto set one when
clock auto set is active and register set one when clock auto set is disabled.
0 (in decimal): D=0000
1 (in decimal): D=0001
....
9999 (in decimal): D=9999
Others: Error
13.0.4.90 Register 99 (0x63)
Figure 184. Register 99 (0x63)
7
6
5
4
3
2
1
0
Reserved
PDDM
R/W
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
7-6 Reserved
5
PDDM
Table 123. Register 99 (0x63) Field Descriptions
Type
R/W
R
Reset
0
Description
Reserved
PLL D Monitor (LSB) – These bits indicate the actually used value for PLL
multiplication factor D of the overall J.D × R. The actual value is the auto set one when
clock auto set is active and register set one when clock auto set is disabled.
0 (in decimal): D=0000
1 (in decimal): D=0001
....
9999 (in decimal): D=9999
Others: Error
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