LM3S9GN5_15 Datasheet, PDF (1317/1391 Pages) Texas Instruments – Stellaris LM3S9GN5 Microcontroller

Stellaris^® LM3S9GN5 Microcontroller
Figure 26-24. I²C Timing
I2
I6
I5
I2CSCL
I1
I4
I7
I8 I3
I9
I2CSDA
26.16 Inter-Integrated Circuit Sound (I²S) Interface
Table 26-27. I²S Master Clock (Receive and Transmit)
Parameter No.
M1
M2
M3
M4
M5
M6
Parameter
T_{MCLK_PER}
T_MCLKRF
T_{MCLK_HIGH}
T_{MCLK_LOW}
T_MDC
T_MJITTER
Parameter Name
Cycle time
Rise/fall time
High time
Low time
Duty cycle
Jitter
Min
Nom
Max
20.3
-
-
See “Input/Output
Characteristics” on page 1307.
10
-
-
10
-
-
48
-
52
-
-
2.5
Table 26-28. I²S Slave Clock (Receive and Transmit)
Parameter No.
M7
M8
M9
M10
Parameter
T_{SCLK_PER}
T_{SCLK_HIGH}
T_{SCLK_LOW}
T_SDC
Parameter Name
Cycle time
High time
Low time
Duty cycle
Min
Nom
Max
80
-
-
40
-
-
40
-
-
-
50
-
Table 26-29. I²S Master Mode
Parameter No.
M11
M12
M13
M14
Parameter
T_MSWS
T_MSD
T_MSDS
T_MSDH
Parameter Name
SCK fall to WS valid
SCK fall to TXSD valid
RXSD setup time to SCK rise
RXSD hold time from SCK rise
Min
Nom
Max
-
-
10
-
-
10
10
-
-
10
-
-
Figure 26-25. I²S Master Mode Transmit Timing
Unit
ns
ns
ns
ns
%
ns
Unit
ns
ns
ns
%
Unit
ns
ns
ns
ns
SCK
WS
TXSD
M11
M12
Data
July 03, 2014
Texas Instruments-Production Data
1317