UCC28251 Datasheet, PDF (13/54 Pages) Texas Instruments – Advanced PWM Controller With Pre-Bias Operation

UCC28251
www.ti.com
SLUSBD8D – FEBRUARY 2013 – REVISED APRIL 2013
A pulse signal may also be applied to the EN pin. Pulse-enable operation is shown on Figure 4. If the EN falling
edge happens before the SS voltage reaches 0.3 V, the enable signal at EN pin is considered as a pulse. In this
case, the next rising edge at EN pin disables the controller. If the falling edge of the first pulse at EN pin happens
after SS rises to 0.3 V, the UCC28251 interprets the pulse enable as a level enable, and an external solution as
shown on Figure 5 (a) can be used to reduce the pulse width. In this circuit, R2 is used to limit the current
(especially the negative current) through the internal ESD cell. Figure 5 (b) illustrates the waveforms based on
this solution. To prevent false trigger by noises, the pulse at the EN pin must be at least 2.25 V (minimum) high
and 3 µs wide to be considered valid.
Choose the R1, R2, and C values based on the following equations:
Choose R2 based on the current limit requirement of under 0.1 mA .
R
2
>
10 kW
(1)
Choose R1 arbitrarily but much smaller than R2 and choose C1 according to the time constant requirement to
generate longer than 3-µs pulse.
C
1
=
6 ms
R
1
(2)
If enable function is not used, pull EN pin to VREF.
UVLO
EN
0.3V
SS
CLK
Figure 4. Pulse Enable at EN Pin
(a)
(b)
UCC28251
C1
Enable
R2
Signal
EN
R1
Enable
Signal
EN
Figure 5. An External Solution to Generate Enable Pulses for Pulse Enable
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: UCC28251
Submit Documentation Feedback
13