TUSB1210 Datasheet, PDF (13/66 Pages) Texas Instruments – TUSB1210 Stand-Alone USB Transceiver Chip Silicon

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TUSB1210
SLLSE09H – NOVEMBER 2009 – REVISED JUNE 2015
4.8.2.2 Timers and Debounce
PARAMETER
T_{DEL_CS_SUPPLYOK}
T_{DEL_RST_DIR}
Chip-select-to-supplies OK delay
RESETB to PHY PLL locked and DIR
falling-edge delay
T_VBBDET
T_BGAP
T_PWONVDD15
T_PWONCK32K
T_DELRSTPWR
T_DELMNTRVIOEN
T_MNTR
T_DELVDD33EN
T_DELRESETB
T_PLL
V_BAT detection delay
Bandgap power-on delay
V_DD15 power-on delay
32-KHz RC-OSC power-on delay
Power control reset delay
Monitor enable delay
Supply monitoring debounce
V_DD33 LDO enable delay
RESETB internal delay
PLL lock time
COMMENTS
MIN
TYP
MAX UNIT
2.84
4.10 ms
0.54
0.647 ms
10
us
2
ms
100
us
125
us
61
us
91.5
us
183.1
us
93.75
us
244.1
us
300
us
4.9 Timing Parameter Definitions
The timing parameter symbols used in the timing requirement and switching characteristic tables are created in
accordance with JEDEC Standard 100. To shorten the symbols, some pin names and other related terminologies
have been abbreviated as shown in Table 4-8.
Table 4-8. Timing Parameter Definitions
SYMBOL
C
D
Dis
En
H
Su
START
T
V
W
X
H
L
V
IV
AE
FE
LE
Z
LOWERCASE SUBSCRIPTS
PARAMETER
Cycle time (period)
Delay time
Disable time
Enable time
Hold time
Setup time
Start bit
Transition time
Valid time
Pulse duration (width)
Unknown, changing, or don't care level
High
Low
Valid
Invalid
Active edge
First edge
Last edge
High impedance
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Specifications
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